[Intel-gfx] [PATCH 02/17] drm/i915: s/GEN3/GEN5/

[Chris Wilson]

Quoting ville.syrjala at linux.intel.com (2017-06-22 12:55:40)
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> The GEN5_IRQ_RESET/INIT macros are perfectly suitable even for
> gen3/4 hardware as those have 32 bit interrupt registers. Let's
> rename the macros to reflect that fact.
> 
> Gen2 on the other hand has 16 bit interrupt registers so these
> macros aren't really appropriate there.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris