[Intel-gfx] [PATCH 05/20] drm/i915: introduce page_size members

Zhenyu Wang zhenyuw at linux.intel.com
Thu Jun 29 15:33:41 UTC 2017


On 2017.06.29 12:59:08 +0100, Chris Wilson wrote:
> Quoting Matthew Auld (2017-06-29 12:54:51)
> > On 29 June 2017 at 07:36, Zhenyu Wang <zhenyuw at linux.intel.com> wrote:
> > > We need to fallback to default supported page size when vGPU is active (intel_vgpu_active() is true).
> > > Currently gvt gtt handling can't support huge page entry yet, we need to check either hypervisor
> > > mm can support huge guest page or just do emulation in gvt.
> > That should already be the case, since the guest doesn't support the
> > 48b PPGTT. But it looks you are working to change that, so I guess we
> > should just do this anyway?
>

yes, 48b ppgtt guest will be supported.

> Fwiw, I think it makes sense just to sanitize the
> mkwrite_intel_info()->page_sizes under virtualisation. Primarily to
> document what we know does not work at the moment and so different
> features can be enabled individually.

I just thought the minimal code change to take that into account, as long as
it's after vgpu active/feature detect, that's fine too.

> Or just disable gvt :-p

That reason is not strong enough I believe. ;)

-- 
Open Source Technology Center, Intel ltd.

$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 195 bytes
Desc: not available
URL: <https://lists.freedesktop.org/archives/intel-gfx/attachments/20170629/2cdaca6d/attachment-0001.sig>


More information about the Intel-gfx mailing list