[Intel-gfx] [PATCH v2 1/2] drm/i915/skl+: Check for supported plane configuration in Interlace mode

Mahesh Kumar mahesh1.kumar at intel.com
Thu Jun 29 16:40:29 UTC 2017


In Gen9 platform Interlaced fetch mode doesn't support following plane
configuration:
 - Y/Yf tiling
 - 90/270 rotation
 - YUV420 hybrid planar source pixel formats.

This patch adds check to fail the flip if any of the above configuration
is requested.

Changes since V1:
 - handle checks in intel_plane_atomic_check_with_state (ville)
 - takeout plane scaler checks, combine with pipe scaler in next patch

Signed-off-by: Mahesh Kumar <mahesh1.kumar at intel.com>
---
 drivers/gpu/drm/i915/intel_atomic_plane.c | 33 +++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
index 4325cb0a04f5..2b60a67c5393 100644
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -114,6 +114,8 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
 	struct drm_i915_private *dev_priv = to_i915(plane->dev);
 	struct drm_plane_state *state = &intel_state->base;
 	struct intel_plane *intel_plane = to_intel_plane(plane);
+	const struct drm_display_mode *adjusted_mode =
+						&crtc_state->base.adjusted_mode;
 	int ret;
 
 	/*
@@ -173,6 +175,37 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
 	if (ret)
 		return ret;
 
+	/*
+	 * Y-tiling is not supported in IF-ID Interlace mode in
+	 * GEN9 and above.
+	 * Scaling is not supported with Interlaced fetch mode.
+	 * YUV420 hybrid planar source pixel formats are not supported with
+	 * Interlaced fetch mode.
+	 */
+	if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
+			adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
+		struct drm_framebuffer *fb = state->fb;
+		struct drm_format_name_buf format_name;
+
+		if (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
+		    fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
+			DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
+			return -EINVAL;
+		}
+
+		switch (fb->format->format) {
+		case DRM_FORMAT_NV12:
+		case DRM_FORMAT_YUV420:
+		case DRM_FORMAT_YVU420:
+			DRM_DEBUG_KMS("Unsupported pixel format %s for IF-ID\n",
+				      drm_get_format_name(fb->format->format,
+				      &format_name));
+			return -EINVAL;
+		default:
+			break;
+		}
+	}
+
 	/* FIXME pre-g4x don't work like this */
 	if (intel_state->base.visible)
 		crtc_state->active_planes |= BIT(intel_plane->id);
-- 
2.13.0



More information about the Intel-gfx mailing list