[Intel-gfx] [PATCH] drm/i915/cfl: Fix Workarounds.

Pandiyan, Dhinakaran dhinakaran.pandiyan at intel.com
Thu Jun 29 20:02:46 UTC 2017


I went and read Mika's review in [1] and also the patches posted and
committed after that. The version currently in drm-tip deviates from his
review and the fix here addresses Mika's comments correctly.

Verified that BSpec does indeed say 
WaDisableKillLogic is applicable to only SKL and BXT.


As for WaDisableHDCInvalidation, git blame indicates this is intended to
be retained for all gen9 platforms. 

So this patch lgtm.

Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>

[1]
https://lists.freedesktop.org/archives/intel-gfx/2017-June/130100.html



-DK

On Mon, 2017-06-19 at 14:21 -0700, Rodrigo Vivi wrote:
> During the review of Coffee Lake workarounds Mika pointed out
> that WaDisableKillLogic and GEN9_DISABLE_OCL_OOB_SUPPRESS_LOGIC
> should be removed from CFL and with that I should carry the rv-b.
> 
> However when doing the v2 I removed another Workaround that should
> remain because although not mentioned by spec the history of hangs
> around it advocates on its favor.
> 
> On some follow-up patches I continued operating on the wrong
> workardound, but Ville noticed that, so here is the fix for the
> current CFL code that is upstream already.
> 
> Fixes: 46c26662d2f ("drm/i915/cfl: Introduce Coffee Lake workarounds.")
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
> Cc: Mika Kuoppala <mika.kuoppala at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_engine_cs.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index a4487c5..5b4de71 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -821,9 +821,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
>  	I915_WRITE(BDW_SCRATCH1, I915_READ(BDW_SCRATCH1) |
>  		   GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE);
>  
> -	/* WaDisableKillLogic:bxt,skl,kbl,cfl */
> -	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
> -		   ECOCHK_DIS_TLB);
> +	/* WaDisableKillLogic:bxt,skl,kbl */
> +	if (!IS_COFFEELAKE(dev_priv))
> +		I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
> +			   ECOCHK_DIS_TLB);
>  
>  	/* WaClearFlowControlGpgpuContextSave:skl,bxt,kbl,glk,cfl */
>  	/* WaDisablePartialInstShootdown:skl,bxt,kbl,glk,cfl */
> @@ -894,10 +895,9 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
>  	WA_SET_BIT_MASKED(HDC_CHICKEN0,
>  			  HDC_FORCE_NON_COHERENT);
>  
> -	/* WaDisableHDCInvalidation:skl,bxt,kbl */
> -	if (!IS_COFFEELAKE(dev_priv))
> -		I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
> -			   BDW_DISABLE_HDC_INVALIDATION);
> +	/* WaDisableHDCInvalidation:skl,bxt,kbl,cfl */
> +	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
> +		   BDW_DISABLE_HDC_INVALIDATION);
>  
>  	/* WaDisableSamplerPowerBypassForSOPingPong:skl,bxt,kbl,cfl */
>  	if (IS_SKYLAKE(dev_priv) ||


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