[Intel-gfx] [PATCH v2 5/5] x86/io: Make readq() / writeq() API consistent

[Andy Shevchenko]

Despite the commit 93093d099e5d

	x86: provide readq()/writeq() on 32-bit too, complete

says
	...Also, map all the APIs to the strongest ordering variant. It's way
	too easy to mess such details up in drivers and the difference between
	"memory" and "" constrained asm() constructs is in the noise range.

we have for now only one user of this API (i.e. writeq_relaxed() in
drivers/hwtracing/intel_th/sth.c) on x86 and it does care about
"relaxed" part of it. Moreover 32-bit support has been removed from that
header, though appeared later in specific headers that emphasizes its
non-atomic context.

The rest should keep in mind consistent picture of __raw_IO() vs. IO()
vs. IO_relaxed() API.

Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com>
---
 arch/x86/include/asm/io.h | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index b3bba2f87e18..9ada93f01524 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -94,13 +94,15 @@ build_mmio_write(__writel, "l", unsigned int, "r", )
 #ifdef CONFIG_X86_64
 
 build_mmio_read(readq, "q", unsigned long, "=r", :"memory")
+build_mmio_read(__readq, "q", unsigned long, "=r", )
 build_mmio_write(writeq, "q", unsigned long, "r", :"memory")
+build_mmio_write(__writeq, "q", unsigned long, "r", )
 
-#define readq_relaxed(a)	readq(a)
-#define writeq_relaxed(v, a)	writeq(v, a)
+#define readq_relaxed(a)	__readq(a)
+#define writeq_relaxed(v, a)	__writeq(v, a)
 
-#define __raw_readq(a)		readq(a)
-#define __raw_writeq(val, addr)	writeq(val, addr)
+#define __raw_readq		__readq
+#define __raw_writeq		__writeq
 
 /* Let people know that we have them */
 #define readq			readq
-- 
2.11.0