[Intel-gfx] [PATCH] drm/i915: Extend residency counter ranges on chv and byt

[Chris Wilson]

On Thu, Mar 02, 2017 at 06:13:15PM +0000, Chris Wilson wrote:
> On Thu, Mar 02, 2017 at 08:01:40PM +0200, Mika Kuoppala wrote:
> > We were passively acting on the high counter value bit
> > and as it was never set, we were only utilizing the
> > the 32bits of resolution. As the divisor with these platforms
> > is quite high, the wrap around happened in the less than 13 seconds.
> > 
> > If we toggle the resolution bit in the control register and
> > read twice we can get 8 bits more, bringing the wrap in
> > 54 minute range.
> > 
> > Reported-by: Len Brown <len.brown at intel.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94852

Hah, that was Len complaining about the wrap at 91 minutes.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre