[Intel-gfx] [PATCH] drm/i915: Extend residency counter ranges on chv and byt

[Chris Wilson]

On Thu, Mar 02, 2017 at 08:13:31PM +0200, Ville Syrjälä wrote:
> On Thu, Mar 02, 2017 at 08:01:40PM +0200, Mika Kuoppala wrote:
> > We were passively acting on the high counter value bit
> > and as it was never set, we were only utilizing the
> > the 32bits of resolution. As the divisor with these platforms
> > is quite high, the wrap around happened in the less than 13 seconds.
> > 
> > If we toggle the resolution bit in the control register and
> 
> Can't be done on all machines. IIRC both Chris and me tried this at
> some point and on some machines the register was locked. Also I'm
> not sure if some piece of firmware depends on the original setting.

> Ville Syrjälä wrote:
> On Thu, Apr 07, 2016 at 02:58:01PM +0100, Chris Wilson wrote:
> > On Thu, Apr 07, 2016 at 04:18:16PM +0300, Ville Syrjälä wrote:
> > > On Thu, Apr 07, 2016 at 01:59:44PM +0100, Chris Wilson wrote:
> > > > Can we set that bit ourselves? That puts the overflow into the 1 hour
> > > > mark. Thanks,
> > > 
> > > I don't know if it's safe to frob the bit. I worry that something
> > > outside our control might depend on it staying put.
> > 
> > A quick frob of the bit says that it is RO. When I try to set it, it
> > doesn't stick. :(
> 
> Same here on my VLV. I was able to toggle it on my BSW. Perhaps
> something can lock it down, and my BSW BIOS just doesn't do that.

Bah. Humbug.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre