[Intel-gfx] [PULL] drm-intel-fixes
Jani Nikula
jani.nikula at intel.com
Thu Mar 9 08:37:34 UTC 2017
Hi Dave, here's two batches of gvt-g fixes. I've got more coming, but no
reason to delay these.
drm-intel-fixes-2017-03-09:
flushing out gvt-g fixes
BR,
Jani.
The following changes since commit c1ae3cfa0e89fa1a7ecc4c99031f5e9ae99d9201:
Linux 4.11-rc1 (2017-03-05 12:59:56 -0800)
are available in the git repository at:
git://anongit.freedesktop.org/git/drm-intel tags/drm-intel-fixes-2017-03-09
for you to fetch changes up to 70647f9163aa4fc7090b0d6795d026ebe3897928:
Merge tag 'gvt-fixes-2017-03-08' of https://github.com/01org/gvt-linux into drm-intel-fixes (2017-03-08 12:21:54 +0200)
----------------------------------------------------------------
flushing out gvt-g fixes
----------------------------------------------------------------
Bing Niu (1):
drm/i915/gvt: set SFUSE_STRAP properly for vitual monitor detection
Changbin Du (1):
drm/i915/gvt: protect RO and Rsvd bits of virtual vgpu configuration space
Chuanxiao Dong (3):
drm/i915/gvt: add a NULL pointer check to avoid kernel panic
drm/i915/gvt: use pfn_valid for better checking
drm/i915/gvt: handle workload lifecycle properly
Jani Nikula (2):
Merge tag 'gvt-next-2017-02-24' of https://github.com/01org/gvt-linux into drm-intel-fixes
Merge tag 'gvt-fixes-2017-03-08' of https://github.com/01org/gvt-linux into drm-intel-fixes
Min He (2):
drm/i915/gvt: introduced failsafe mode into vgpu
drm/i915/gvt: enter failsafe mode when guest requires more resources
Pei Zhang (2):
drm/i915/gvt: add cmd_access to GEN7_HALF_SLICE_CHICKEN1
drm/i915/gvt: add some new MMIOs to cmd_access white list
Ping Gao (1):
drm/i915/gvt: clear the vGPU reset logic
Takashi Iwai (1):
drm/i915/gvt: Fix superfluous newline in GVT_DISPLAY_READY env var
Tina Zhang (1):
drm/i915/gvt: change some gvt_err to gvt_dbg_cmd
Weinan Li (2):
drm/i915/gvt: refine pcode write emulation
drm/i915/gvt: fix pcode mailbox write emulation of BDW
Zhao Yan (8):
drm/i915/gvt: fix unhandled mmio warnings
drm/i915/gvt: add more registers to context save/restore list
drm/i915/gvt: force-nopriv register handling
drm/i915/gvt: set default value to 0 for unhandled mmio regs
drm/i915/gvt: have more registers with F_CMD_ACCESS flags set
drm/i915/gvt: add more registers into handlers list
drm/i915/gvt: fix an error for one register
drm/i915/gvt: fix an error for F_RO flag
Zhao, Xinda (3):
drm/i915/gvt: handle fence reg access during GPU reset
drm/i915/gvt: decrease priority of output msg for untracked mmio
drm/i915/gvt: remove unnecessary error msg from gtt write
Zhenyu Wang (4):
drm/i915/gvt: Fix check error on opregion.c
drm/i915/gvt: adjust to fixed vGPU types
drm/i915/gvt: Add more edid definition support
drm/i915/gvt: add resolution definition for vGPU type
drivers/gpu/drm/i915/gvt/cfg_space.c | 57 ++++-
drivers/gpu/drm/i915/gvt/cmd_parser.c | 10 +-
drivers/gpu/drm/i915/gvt/display.c | 139 +++++++----
drivers/gpu/drm/i915/gvt/display.h | 20 +-
drivers/gpu/drm/i915/gvt/firmware.c | 2 +-
drivers/gpu/drm/i915/gvt/gtt.c | 40 ++--
drivers/gpu/drm/i915/gvt/gvt.h | 12 +-
drivers/gpu/drm/i915/gvt/handlers.c | 439 ++++++++++++++++++++++++----------
drivers/gpu/drm/i915/gvt/kvmgt.c | 12 +-
drivers/gpu/drm/i915/gvt/mmio.c | 66 ++++-
drivers/gpu/drm/i915/gvt/opregion.c | 5 +-
drivers/gpu/drm/i915/gvt/render.c | 16 ++
drivers/gpu/drm/i915/gvt/scheduler.c | 52 ++--
drivers/gpu/drm/i915/gvt/vgpu.c | 72 +++---
14 files changed, 686 insertions(+), 256 deletions(-)
--
Jani Nikula, Intel Open Source Technology Center
More information about the Intel-gfx
mailing list