[Intel-gfx] [PATCH 1/6] drm/i915: Extend i915 perf framework for collecting timestamps on all gpu engines

Chris Wilson chris at chris-wilson.co.uk
Thu Mar 16 07:49:19 UTC 2017


On Thu, Mar 16, 2017 at 11:50:06AM +0530, sourab.gupta at intel.com wrote:
> From: Sourab Gupta <sourab.gupta at intel.com>
> 
> This patch extends the i915  perf framework to handle the perf sample
> collection for any given gpu engine. Particularly, the support
> for collecting timestamp sample type is added, which can be requested for
> any engine.
> With this, for RCS, timestamps and OA reports can be collected together,
> and provided to userspace in separate sample fields. For other engines,
> the capabilility to collect timestamps is added.
> 
> The thing to note is that, still only a single stream instance can be
> opened at any particular time. Though that stream may now be opened for any
> gpu engine, for collection of timestamp samples.
> 
> So, this patch doesn't add the support to open multiple concurrent streams,
> as yet. Though it lays the groundwork for this support to be added
> susequently. Part of this groundwork involves having separate command
> stream buffers, per engine, for holding the samples generated.
> Likewise for a few other data structures maintaining per-engine state.
> 
> Signed-off-by: Sourab Gupta <sourab.gupta at intel.com>
> ---
> @@ -2519,15 +2546,14 @@ struct drm_i915_private {
>  
>  		spinlock_t hook_lock;
>  
> -		struct {
> -			struct i915_perf_stream *exclusive_stream;
> +		struct hrtimer poll_check_timer;
> +		struct i915_perf_stream *exclusive_stream;
> +		wait_queue_head_t poll_wq[I915_NUM_ENGINES];
> +		bool pollin[I915_NUM_ENGINES];

So what's the rationale for not storing these [NUM_ENGINES] on the
engines?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre


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