[Intel-gfx] [PATCH v6 13/23] drm/i915/slpc: Send SHUTDOWN event
Sagar Arun Kamble
sagar.a.kamble at intel.com
Thu Mar 16 16:32:15 UTC 2017
From: Tom O'Rourke <Tom.O'Rourke at intel.com>
Send SLPC shutdown event during disable, suspend, and reset
operations. Sending shutdown event while already shutdown
is OK.
v1: Return void instead of ignored error code (Paulo)
Removed WARN_ON for checking msb of gtt address of
shared gem obj. (ChrisW)
Added SLPC state update during disable, suspend and reset.
Changed semantics of reset. It is supposed to just disable. (Sagar)
v2-v4: Rebase.
v5: Updated the input data structure. (Sagar)
Signed-off-by: Tom O'Rourke <Tom.O'Rourke at intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
---
drivers/gpu/drm/i915/intel_slpc.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_slpc.c b/drivers/gpu/drm/i915/intel_slpc.c
index b1900e7..10d9af2 100644
--- a/drivers/gpu/drm/i915/intel_slpc.c
+++ b/drivers/gpu/drm/i915/intel_slpc.c
@@ -132,6 +132,18 @@ static void host2guc_slpc_query_task_state(struct drm_i915_private *dev_priv)
host2guc_slpc(dev_priv, &data, 4);
}
+static void host2guc_slpc_shutdown(struct drm_i915_private *dev_priv)
+{
+ struct slpc_event_input data = {0};
+ u32 shared_data_gtt_offset = i915_ggtt_offset(dev_priv->guc.slpc.vma);
+
+ data.header.value = SLPC_EVENT(SLPC_EVENT_SHUTDOWN, 2);
+ data.args[0] = shared_data_gtt_offset;
+ data.args[1] = 0;
+
+ host2guc_slpc(dev_priv, &data, 4);
+}
+
void intel_slpc_query_task_state(struct drm_i915_private *dev_priv)
{
if (dev_priv->guc.slpc.active)
@@ -259,8 +271,12 @@ void intel_slpc_enable(struct drm_i915_private *dev_priv)
void intel_slpc_suspend(struct drm_i915_private *dev_priv)
{
+ host2guc_slpc_shutdown(dev_priv);
+ dev_priv->guc.slpc.active = false;
}
void intel_slpc_disable(struct drm_i915_private *dev_priv)
{
+ host2guc_slpc_shutdown(dev_priv);
+ dev_priv->guc.slpc.active = false;
}
--
1.9.1
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