[Intel-gfx] [PATCH v7 21/21] drm/i915/slpc: Enable SLPC, where supported

[Sagar Arun Kamble]

From: Tom O'Rourke <Tom.O'Rourke at intel.com>

SLPC GTPERF, BALANCER, DCC are needed for better power and
performance management with GuC based submission.
SLPC GTPERF is evaluated on SKL/APL/KBL for Linux benchmarks.
SLPC support for these platforms is added in earlier patches.
This patch makes SLPC enabled by default for those platforms.
BALANCER, DCC evaluation/enabling for Linux will follow.

v1: Removing warning "enable_slpc < 0" as it is
set to -1 with this patch now. This was caught by CI BAT.

v2-v4: Rebase.

v5: Sanitizing SLPC option based on capabilities earlier in
driver load for handling uncore sanitization properly.

v6: Rebase.

v7: Sanitization removed as it is done in earlier patches during
intel_uc_sanitize_options. Commit message update.

Testcase: igt/pm_slpc
Signed-off-by: Tom O'Rourke <Tom.O'Rourke at intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
---
 drivers/gpu/drm/i915/i915_params.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 6393a17..e4a22ce 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -36,7 +36,7 @@ struct i915_params i915 __read_mostly = {
 	.enable_dc = -1,
 	.enable_fbc = -1,
 	.enable_execlists = -1,
-	.enable_slpc = 0,
+	.enable_slpc = -1,
 	.enable_hangcheck = true,
 	.enable_ppgtt = -1,
 	.enable_psr = -1,
@@ -146,7 +146,7 @@ struct i915_params i915 __read_mostly = {
 module_param_named_unsafe(enable_slpc, i915.enable_slpc, int, 0400);
 MODULE_PARM_DESC(enable_slpc,
 	"Override single-loop-power-controller (slpc) usage. "
-	"(-1=auto, 0=disabled [default], 1=enabled)");
+	"(-1=auto [default], 0=disabled, 1=enabled)");
 
 module_param_named_unsafe(enable_psr, i915.enable_psr, int, 0600);
 MODULE_PARM_DESC(enable_psr, "Enable PSR "
-- 
1.9.1