[Intel-gfx] [PATCH v2 0/5] Enable OA unit for Gen 8 and 9 in i915 perf

Robert Bragg robert at sixbynine.org
Thu Mar 23 20:18:32 UTC 2017


Compared to the last Gen8+ OA series I've been investigating and debugging a
number of issues with the configuration of the Flexible EU counters whose state
is per-context:

* Removes assumption about the mmio registers having a contiguous range of
  addresses which wasn't true.
* Ensures that newly allocated contexts (while the OA unit is in use) will
  have their OA state properly initialized.
* Makes sure to only update render context state.

Instead of attempting to have a general purpose uncore api for dealing with the
details of allowing mmio writes to per-context registers this just adds a
constrained utility in i915_perf.c itself.

The per-gen initialization/configuration has been reworked to avoid a lot of
copy and paste boilerplate.

Addresses the codegen issue Matt noticed with the Broadwell ComputeExtended
metric set after checking with the authors of the XML files that the second
unconditional MUX config should affectively be appended to the end of all the
conditional configs.

(as with the last gen8+ series I sent, it's based on the various gen7 prep
patches that have been sent out separately)

These patches can be pulled from my wip/rib/oa-next branch here:

  https://github.com/rib/linux

In case anyone wants to take a look at the IGT tests so far they can be found
here:

  https://github.com/rib/intel-gpu-tools/commits/wip/rib/i915-perf-tests

Regards,
- Robert

Robert Bragg (5):
  drm/i915: expose _SLICE_MASK GETPARM
  drm/i915: expose _SUBSLICE_MASK GETPARM
  drm/i915: Add 'render basic' Gen8+ OA unit configs
  drm/i915: Add OA unit support for Gen 8+
  drm/i915: Add more OA configs for BDW, CHV, SKL + BXT

 drivers/gpu/drm/i915/Makefile           |    8 +-
 drivers/gpu/drm/i915/i915_drv.c         |   10 +
 drivers/gpu/drm/i915/i915_drv.h         |   31 +-
 drivers/gpu/drm/i915/i915_gem_context.h |    1 +
 drivers/gpu/drm/i915/i915_oa_bdw.c      | 5154 +++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_oa_bdw.h      |   38 +
 drivers/gpu/drm/i915/i915_oa_bxt.c      | 2541 +++++++++++++++
 drivers/gpu/drm/i915/i915_oa_bxt.h      |   38 +
 drivers/gpu/drm/i915/i915_oa_chv.c      | 2730 ++++++++++++++++
 drivers/gpu/drm/i915/i915_oa_chv.h      |   38 +
 drivers/gpu/drm/i915/i915_oa_hsw.c      |   58 +-
 drivers/gpu/drm/i915/i915_oa_sklgt2.c   | 3303 ++++++++++++++++++++
 drivers/gpu/drm/i915/i915_oa_sklgt2.h   |   38 +
 drivers/gpu/drm/i915/i915_oa_sklgt3.c   | 2856 +++++++++++++++++
 drivers/gpu/drm/i915/i915_oa_sklgt3.h   |   38 +
 drivers/gpu/drm/i915/i915_oa_sklgt4.c   | 2910 +++++++++++++++++
 drivers/gpu/drm/i915/i915_oa_sklgt4.h   |   38 +
 drivers/gpu/drm/i915/i915_perf.c        | 1034 ++++++-
 drivers/gpu/drm/i915/i915_reg.h         |   22 +
 drivers/gpu/drm/i915/intel_lrc.c        |    5 +
 include/uapi/drm/i915_drm.h             |   21 +-
 21 files changed, 20825 insertions(+), 87 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_oa_bdw.c
 create mode 100644 drivers/gpu/drm/i915/i915_oa_bdw.h
 create mode 100644 drivers/gpu/drm/i915/i915_oa_bxt.c
 create mode 100644 drivers/gpu/drm/i915/i915_oa_bxt.h
 create mode 100644 drivers/gpu/drm/i915/i915_oa_chv.c
 create mode 100644 drivers/gpu/drm/i915/i915_oa_chv.h
 create mode 100644 drivers/gpu/drm/i915/i915_oa_sklgt2.c
 create mode 100644 drivers/gpu/drm/i915/i915_oa_sklgt2.h
 create mode 100644 drivers/gpu/drm/i915/i915_oa_sklgt3.c
 create mode 100644 drivers/gpu/drm/i915/i915_oa_sklgt3.h
 create mode 100644 drivers/gpu/drm/i915/i915_oa_sklgt4.c
 create mode 100644 drivers/gpu/drm/i915/i915_oa_sklgt4.h

-- 
2.12.0



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