[Intel-gfx] [PATCH] drm/i915: Reorganise intel_engine_cleanup

Chris Wilson chris at chris-wilson.co.uk
Fri Mar 24 10:36:18 UTC 2017


Merge the two vfuncs into one and so eliminate one more case of
execlists/ringbuffer specialisation outside of the intel_engine_cs.c

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_drv.c         |  2 +-
 drivers/gpu/drm/i915/i915_drv.h         |  2 --
 drivers/gpu/drm/i915/i915_gem.c         | 17 ++-------
 drivers/gpu/drm/i915/intel_engine_cs.c  | 11 +++++-
 drivers/gpu/drm/i915/intel_lrc.c        | 21 ++++-------
 drivers/gpu/drm/i915/intel_lrc.h        |  1 -
 drivers/gpu/drm/i915/intel_ringbuffer.c | 63 ++++++++++++++++-----------------
 drivers/gpu/drm/i915/intel_ringbuffer.h |  1 +
 8 files changed, 50 insertions(+), 68 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 547d7d198271..6020ef8bd3b2 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -554,7 +554,7 @@ static void i915_gem_fini(struct drm_i915_private *dev_priv)
 	mutex_lock(&dev_priv->drm.struct_mutex);
 	if (i915.enable_guc_loading)
 		intel_uc_fini_hw(dev_priv);
-	i915_gem_cleanup_engines(dev_priv);
+	intel_engines_cleanup(dev_priv);
 	i915_gem_context_fini(dev_priv);
 	i915_gem_cleanup_userptr(dev_priv);
 	mutex_unlock(&dev_priv->drm.struct_mutex);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e20a21c7ecdf..5274acfe5df9 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2519,7 +2519,6 @@ struct drm_i915_private {
 	/* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
 	struct {
 		void (*resume)(struct drm_i915_private *);
-		void (*cleanup_engine)(struct intel_engine_cs *engine);
 
 		struct list_head timelines;
 		struct i915_gem_timeline global_timeline;
@@ -3369,7 +3368,6 @@ void i915_gem_init_mmio(struct drm_i915_private *i915);
 int __must_check i915_gem_init(struct drm_i915_private *dev_priv);
 int __must_check i915_gem_init_hw(struct drm_i915_private *dev_priv);
 void i915_gem_init_swizzling(struct drm_i915_private *dev_priv);
-void i915_gem_cleanup_engines(struct drm_i915_private *dev_priv);
 int i915_gem_wait_for_idle(struct drm_i915_private *dev_priv,
 			   unsigned int flags);
 int __must_check i915_gem_suspend(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5704dbfe5653..ab77e38ec264 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4602,13 +4602,10 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 	i915_vma_init(dev_priv);
 	i915_gem_clflush_init(dev_priv);
 
-	if (USE_EXECLISTS(dev_priv)) {
+	if (USE_EXECLISTS(dev_priv))
 		dev_priv->gt.resume = intel_lr_context_resume;
-		dev_priv->gt.cleanup_engine = intel_logical_ring_cleanup;
-	} else {
+	else
 		dev_priv->gt.resume = intel_legacy_submission_resume;
-		dev_priv->gt.cleanup_engine = intel_engine_cleanup;
-	}
 
 	/* This is just a security blanket to placate dragons.
 	 * On some systems, we very sporadically observe that the first TLBs
@@ -4658,16 +4655,6 @@ void i915_gem_init_mmio(struct drm_i915_private *i915)
 }
 
 void
-i915_gem_cleanup_engines(struct drm_i915_private *dev_priv)
-{
-	struct intel_engine_cs *engine;
-	enum intel_engine_id id;
-
-	for_each_engine(engine, dev_priv, id)
-		dev_priv->gt.cleanup_engine(engine);
-}
-
-void
 i915_gem_load_init_fences(struct drm_i915_private *dev_priv)
 {
 	int i;
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 4045b971a0ff..bd91aa1f0deb 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -214,7 +214,7 @@ int intel_engines_init(struct drm_i915_private *dev_priv)
 		if (id >= err_id)
 			kfree(engine);
 		else
-			dev_priv->gt.cleanup_engine(engine);
+			engine->cleanup(engine);
 	}
 	return err;
 }
@@ -1116,6 +1116,15 @@ void intel_engines_reset_default_submission(struct drm_i915_private *i915)
 		engine->set_default_submission(engine);
 }
 
+void intel_engines_cleanup(struct drm_i915_private *i915)
+{
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+
+	for_each_engine(engine, i915, id)
+		engine->cleanup(engine);
+}
+
 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
 #include "selftests/mock_engine.c"
 #endif
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 3bab62c2d800..d45e6d13545a 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1518,13 +1518,9 @@ static int gen8_init_rcs_context(struct drm_i915_gem_request *req)
 	return i915_gem_render_state_emit(req);
 }
 
-/**
- * intel_logical_ring_cleanup() - deallocate the Engine Command Streamer
- * @engine: Engine Command Streamer.
- */
-void intel_logical_ring_cleanup(struct intel_engine_cs *engine)
+static void cleanup_ring(struct intel_engine_cs *engine)
 {
-	struct drm_i915_private *dev_priv;
+	struct drm_i915_private *dev_priv = engine->i915;
 
 	/*
 	 * Tasklet cannot be active at this point due intel_mark_active/idle
@@ -1533,14 +1529,7 @@ void intel_logical_ring_cleanup(struct intel_engine_cs *engine)
 	if (WARN_ON(test_bit(TASKLET_STATE_SCHED, &engine->irq_tasklet.state)))
 		tasklet_kill(&engine->irq_tasklet);
 
-	dev_priv = engine->i915;
-
-	if (engine->buffer) {
-		WARN_ON((I915_READ_MODE(engine) & MODE_IDLE) == 0);
-	}
-
-	if (engine->cleanup)
-		engine->cleanup(engine);
+	GEM_BUG_ON(engine->buffer);
 
 	if (engine->status_page.vma) {
 		i915_gem_object_unpin_map(engine->status_page.vma->obj);
@@ -1565,6 +1554,8 @@ static void execlists_set_default_submission(struct intel_engine_cs *engine)
 static void
 logical_ring_default_vfuncs(struct intel_engine_cs *engine)
 {
+	engine->cleanup = cleanup_ring;
+
 	/* Default vfuncs which can be overriden by each engine. */
 	engine->init_hw = gen8_init_common_ring;
 	engine->reset_hw = reset_common_ring;
@@ -1663,7 +1654,7 @@ logical_ring_init(struct intel_engine_cs *engine)
 	return 0;
 
 error:
-	intel_logical_ring_cleanup(engine);
+	engine->cleanup(engine);
 	return ret;
 }
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 0cd7d8f6738f..64c9219a88ba 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -64,7 +64,6 @@ enum {
 
 /* Logical Rings */
 void intel_logical_ring_stop(struct intel_engine_cs *engine);
-void intel_logical_ring_cleanup(struct intel_engine_cs *engine);
 int logical_render_ring_init(struct intel_engine_cs *engine);
 int logical_xcs_ring_init(struct intel_engine_cs *engine);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 0201958232bb..ab5e2e0623b7 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1348,42 +1348,10 @@ static int intel_init_ring_buffer(struct intel_engine_cs *engine)
 	return 0;
 
 error:
-	intel_engine_cleanup(engine);
+	engine->cleanup(engine);
 	return ret;
 }
 
-void intel_engine_cleanup(struct intel_engine_cs *engine)
-{
-	struct drm_i915_private *dev_priv;
-
-	dev_priv = engine->i915;
-
-	if (engine->buffer) {
-		WARN_ON(INTEL_GEN(dev_priv) > 2 &&
-			(I915_READ_MODE(engine) & MODE_IDLE) == 0);
-
-		intel_ring_unpin(engine->buffer);
-		intel_ring_free(engine->buffer);
-		engine->buffer = NULL;
-	}
-
-	if (engine->cleanup)
-		engine->cleanup(engine);
-
-	if (HWS_NEEDS_PHYSICAL(dev_priv)) {
-		WARN_ON(engine->id != RCS);
-		cleanup_phys_status_page(engine);
-	} else {
-		cleanup_status_page(engine);
-	}
-
-	intel_engine_cleanup_common(engine);
-
-	engine->i915 = NULL;
-	dev_priv->engine[engine->id] = NULL;
-	kfree(engine);
-}
-
 void intel_legacy_submission_resume(struct drm_i915_private *dev_priv)
 {
 	struct intel_engine_cs *engine;
@@ -1789,12 +1757,41 @@ static void gen6_bsd_set_default_submission(struct intel_engine_cs *engine)
 	engine->submit_request = gen6_bsd_submit_request;
 }
 
+static void engine_cleanup(struct intel_engine_cs *engine)
+{
+	struct drm_i915_private *dev_priv = engine->i915;
+
+	if (engine->buffer) {
+		WARN_ON(INTEL_GEN(dev_priv) > 2 &&
+			(I915_READ_MODE(engine) & MODE_IDLE) == 0);
+
+		intel_ring_unpin(engine->buffer);
+		intel_ring_free(engine->buffer);
+		engine->buffer = NULL;
+	}
+
+	if (HWS_NEEDS_PHYSICAL(dev_priv)) {
+		WARN_ON(engine->id != RCS);
+		cleanup_phys_status_page(engine);
+	} else {
+		cleanup_status_page(engine);
+	}
+
+	intel_engine_cleanup_common(engine);
+
+	engine->i915 = NULL;
+	dev_priv->engine[engine->id] = NULL;
+	kfree(engine);
+}
+
 static void intel_ring_default_vfuncs(struct drm_i915_private *dev_priv,
 				      struct intel_engine_cs *engine)
 {
 	/* gen8+ are only supported with execlists */
 	GEM_BUG_ON(INTEL_GEN(dev_priv) >= 8);
 
+	engine->cleanup = engine_cleanup;
+
 	intel_ring_init_irq(dev_priv, engine);
 	intel_ring_init_semaphores(dev_priv, engine);
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 8d0615aa0aa9..d5621d6d677c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -658,5 +658,6 @@ bool intel_engine_is_idle(struct intel_engine_cs *engine);
 bool intel_engines_are_idle(struct drm_i915_private *dev_priv);
 
 void intel_engines_reset_default_submission(struct drm_i915_private *i915);
+void intel_engines_cleanup(struct drm_i915_private *i915);
 
 #endif /* _INTEL_RINGBUFFER_H_ */
-- 
2.11.0



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