[Intel-gfx] ✗ Fi.CI.BAT: failure for Gen8+ engine-reset
Patchwork
patchwork at emeril.freedesktop.org
Sat Mar 25 01:50:34 UTC 2017
== Series Details ==
Series: Gen8+ engine-reset
URL : https://patchwork.freedesktop.org/series/21868/
State : failure
== Summary ==
Series 21868v1 Gen8+ engine-reset
https://patchwork.freedesktop.org/api/1.0/series/21868/revisions/1/mbox/
Test pm_rpm:
Subgroup basic-rte:
pass -> DMESG-WARN (fi-skl-6770hq)
Test pm_rps:
Subgroup basic-api:
pass -> INCOMPLETE (fi-skl-6770hq)
fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time: 471s
fi-bdw-gvtdvm total:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time: 469s
fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 time: 585s
fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 537s
fi-bxt-t5700 total:278 pass:258 dwarn:0 dfail:0 fail:0 skip:20 time: 574s
fi-byt-j1900 total:278 pass:251 dwarn:0 dfail:0 fail:0 skip:27 time: 505s
fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 439s
fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 437s
fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time: 444s
fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 513s
fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 491s
fi-kbl-7500u total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 481s
fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 486s
fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time: 600s
fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time: 494s
fi-skl-6770hq total:243 pass:232 dwarn:1 dfail:0 fail:0 skip:9 time: 0s
fi-skl-gvtdvm total:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time: 469s
fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time: 554s
fi-snb-2600 total:278 pass:249 dwarn:0 dfail:0 fail:0 skip:29 time: 424s
fi-byt-n2820 failed to collect. IGT log at Patchwork_4300/fi-byt-n2820/igt.log
102397b5dbb1f68504739adefde2c28a5aba95b9 drm-tip: 2017y-03m-25d-00h-24m-58s UTC integration manifest
6dda863 drm/i915: Watchdog timeout: Export media reset count from GuC to debugfs
a71c802 drm/i915: Watchdog timeout: DRM kernel interface to set the timeout
8e10876 drm/i915: Watchdog timeout: Ringbuffer command emission for gen8+
a2167c8 drm/i915: Watchdog timeout: IRQ handler for gen8+
96e2ee6 drm/i915: Watchdog timeout: Pass GuC shared data structure during param load
5a60c42 drm/i915/guc: Add support for reset engine using GuC commands
6ed1757 drm/i915/guc: Provide register list to be saved/restored during engine reset
af217a8 drm/i915/selftests: reset engine self tests
d43b3eb drm/i915: Add engine reset count in get-reset-stats ioctl
dea8dca drm/i915/tdr: Enable Engine reset and recovery support
f872bd8 drm/i915/tdr: Export per-engine reset count info to debugfs
4d66882b1 drm/i915/tdr: Add engine reset count to error state
a3d1a331 drm/i915: Skip reset request if there is one already
42fdfd1 drm/i915/tdr: Add support for per engine reset recovery
1ce9821 drm/i915/tdr: Modify error handler for per engine hang recovery
15808ca drm/i915: Update i915.reset to handle engine resets
95bad53 drm/i915: Rename gen8_(un)request_engine_reset to gen8_(un)request_reset_engine
56350ec drm/i915: Fix stale comment about I915_RESET_IN_PROGRESS flag
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4300/
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