[Intel-gfx] [PATCH 1/4] drm/i915: Wait for inflight writes before checking intel_engine_is_idle()

[Chris Wilson]

Some GPUs may have writes inflight much longer than expected, so before
declaring the GPU is idle, try to flush them using any
engine->irq_seqno_barrier() if available. By allowing them to be
flushed, we can be a little more confident that the GPU really is idle
when we think it is!

References: https://bugs.freedesktop.org/show_bug.cgi?id=98836
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_engine_cs.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index c76a64483d64..ff6d0e1d1306 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1074,6 +1074,10 @@ bool intel_engine_is_idle(struct intel_engine_cs *engine)
 {
 	struct drm_i915_private *dev_priv = engine->i915;
 
+	/* We have to allow time for writes to land from the GPU. */
+	if (engine->irq_seqno_barrier)
+		engine->irq_seqno_barrier(engine);
+
 	/* Any inflight/incomplete requests? */
 	if (!i915_seqno_passed(intel_engine_get_seqno(engine),
 			       intel_engine_last_submit(engine)))
-- 
2.11.0