[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/7] drm/i915: Mark up clflushes as belonging to an unordered timeline

[Chris Wilson]

On Wed, May 03, 2017 at 09:59:00AM -0000, Patchwork wrote:
> == Series Details ==
> 
> Series: series starting with [CI,1/7] drm/i915: Mark up clflushes as belonging to an unordered timeline
> URL   : https://patchwork.freedesktop.org/series/23874/
> State : success
> 
> == Summary ==
> 
> Series 23874v1 Series without cover letter
> https://patchwork.freedesktop.org/api/1.0/series/23874/revisions/1/mbox/
> 
> Test gem_exec_flush:
>         Subgroup basic-batch-kernel-default-uc:
>                 fail       -> PASS       (fi-snb-2600) fdo#100007
> Test gem_exec_suspend:
>         Subgroup basic-s4-devices:
>                 pass       -> DMESG-WARN (fi-snb-2600) fdo#100125
>                 dmesg-warn -> PASS       (fi-kbl-7560u) fdo#100125
> 
> fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
> fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125

Pushed! Thanks for the review, a rainy day task will be to teach async
waits to msm and promote the syncmap to dma_fence (dma_fence_syncmap?
best name I have so far). Or nouveau maybe a better target as we can do
interop testing more easily.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre