[Intel-gfx] [PATCH RESEND v4 5/6] drm: Add definition for eDP backlight frequency

Jani Nikula jani.nikula at linux.intel.com
Wed May 3 12:49:23 UTC 2017


On Tue, 02 May 2017, Manasi Navare <manasi.d.navare at intel.com> wrote:
> On Tue, Apr 18, 2017 at 04:48:23PM -0700, Puthikorn Voravootivat wrote:
>
> Since this adds definitions in the DRM layer, you need to copy
> the dri-devel at lists.freedesktop.org M-L.
>
>> This patch adds the following definition
>> - Bit mask for EDP_PWMGEN_BIT_COUNT and min/max cap
>>   register which only use bit 0:4
>> - Base frequency (27 MHz) for backlight PWM frequency
>>   generator.
>> 
>> Signed-off-by: Puthikorn Voravootivat <puthik at chromium.org>
>> ---
>>  include/drm/drm_dp_helper.h | 2 ++
>>  1 file changed, 2 insertions(+)
>> 
>> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
>> index c0bd0d7651a9..9aee65ebc54c 100644
>> --- a/include/drm/drm_dp_helper.h
>> +++ b/include/drm/drm_dp_helper.h
>> @@ -572,10 +572,12 @@
>>  #define DP_EDP_PWMGEN_BIT_COUNT             0x724
>>  #define DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN     0x725
>>  #define DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX     0x726
>> +# define  DP_EDP_PWMGEN_BIT_COUNT_MASK      (31 << 0)

For bit masks like this hex is preferred. 0x1f is way more intuitive
than a decimal number.

>>  
>>  #define DP_EDP_BACKLIGHT_CONTROL_STATUS     0x727
>>  
>>  #define DP_EDP_BACKLIGHT_FREQ_SET           0x728
>> +# define DP_EDP_BACKLIGHT_FREQ_BASE         27000000
>
> Could you use HEX value to define this? Thats the convention around.

However I think this is fine as decimal.

BR,
Jani.


>
> Manasi
>>  
>>  #define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MSB   0x72a
>>  #define DP_EDP_BACKLIGHT_FREQ_CAP_MIN_MID   0x72b
>> -- 
>> 2.12.2.816.g2cccc81164-goog
>> 
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>> Intel-gfx at lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Technology Center


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