[Intel-gfx] [PATCH RFC 2/2] drm/i915/guc: Rename has_guc to has_uc

Oscar Mateo oscar.mateo at intel.com
Fri May 5 13:23:18 UTC 2017


AFAIK, every platform with a HuC has a GuC and viceversa, so
make it explicit.

Cc: Anusha Srivatsa <anusha.srivatsa at intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Cc: Chris Wilson <chris at chris-wilson.co.uk>
CC: Arkadiusz Hiler <arkadiusz.hiler at intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c     |  6 +++---
 drivers/gpu/drm/i915/i915_drv.h         |  6 +++---
 drivers/gpu/drm/i915/i915_pci.c         | 10 +++++-----
 drivers/gpu/drm/i915/intel_guc_loader.c |  4 ++--
 drivers/gpu/drm/i915/intel_huc.c        |  3 +--
 drivers/gpu/drm/i915/intel_pm.c         |  2 +-
 drivers/gpu/drm/i915/intel_uc.c         |  2 +-
 7 files changed, 16 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index e030b41..4538a5b 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2366,7 +2366,7 @@ static int i915_huc_load_status_info(struct seq_file *m, void *data)
 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
 	struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
 
-	if (!HAS_GUC(dev_priv)) {
+	if (!HAS_UC(dev_priv)) {
 		seq_puts(m, "No HuC support in HW\n");
 		return 0;
 	}
@@ -2401,7 +2401,7 @@ static int i915_guc_load_status_info(struct seq_file *m, void *data)
 	struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;
 	u32 tmp, i;
 
-	if (!HAS_GUC(dev_priv)) {
+	if (!HAS_UC(dev_priv)) {
 		seq_puts(m, "No GuC support in HW\n");
 		return 0;
 	}
@@ -2508,7 +2508,7 @@ static int i915_guc_info(struct seq_file *m, void *data)
 
 	if (!guc->execbuf_client) {
 		seq_printf(m, "GuC submission %s\n",
-			   HAS_GUC(dev_priv) ?
+			   HAS_UC(dev_priv) ?
 			   "disabled" :
 			   "not supported");
 		return 0;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5d00120..a4d4ac6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -820,7 +820,7 @@ struct intel_csr {
 	func(has_full_48bit_ppgtt); \
 	func(has_gmbus_irq); \
 	func(has_gmch_display); \
-	func(has_guc); \
+	func(has_uc); \
 	func(has_hotplug); \
 	func(has_l3_dpf); \
 	func(has_llc); \
@@ -2921,7 +2921,7 @@ static inline struct scatterlist *__sg_next(struct scatterlist *sg)
 #define HAS_RUNTIME_PM(dev_priv) ((dev_priv)->info.has_runtime_pm)
 #define HAS_64BIT_RELOC(dev_priv) ((dev_priv)->info.has_64bit_reloc)
 
-#define HAS_GUC(dev_priv)	((dev_priv)->info.has_guc)
+#define HAS_UC(dev_priv)	((dev_priv)->info.has_uc)
 #define HAS_GUC_UCODE(dev_priv)	((dev_priv)->guc.fw.path != NULL)
 #define HAS_HUC_UCODE(dev_priv)	((dev_priv)->huc.fw.path != NULL)
 
@@ -2930,7 +2930,7 @@ static inline struct scatterlist *__sg_next(struct scatterlist *sg)
  * to enable GuC submission or we need it to to validate a HuC firmware
  */
 #define NEEDS_GUC_LOADING(dev_priv) \
-	(HAS_GUC(dev_priv) && \
+	(HAS_UC(dev_priv) && \
 	(i915.enable_guc_submission || HAS_HUC_UCODE(dev_priv)))
 
 #define HAS_RESOURCE_STREAMER(dev_priv) ((dev_priv)->info.has_resource_streamer)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f80db2c..261ed3a 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -352,7 +352,7 @@
 	.platform = INTEL_SKYLAKE,
 	.gen = 9,
 	.has_csr = 1,
-	.has_guc = 1,
+	.has_uc = 1,
 	.ddb_size = 896,
 };
 
@@ -361,7 +361,7 @@
 	.platform = INTEL_SKYLAKE,
 	.gen = 9,
 	.has_csr = 1,
-	.has_guc = 1,
+	.has_uc = 1,
 	.ddb_size = 896,
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
@@ -384,7 +384,7 @@
 	.has_dp_mst = 1, \
 	.has_gmbus_irq = 1, \
 	.has_logical_ring_contexts = 1, \
-	.has_guc = 1, \
+	.has_uc = 1, \
 	.has_decoupled_mmio = 1, \
 	.has_aliasing_ppgtt = 1, \
 	.has_full_ppgtt = 1, \
@@ -412,7 +412,7 @@
 	.platform = INTEL_KABYLAKE,
 	.gen = 9,
 	.has_csr = 1,
-	.has_guc = 1,
+	.has_uc = 1,
 	.ddb_size = 896,
 };
 
@@ -421,7 +421,7 @@
 	.platform = INTEL_KABYLAKE,
 	.gen = 9,
 	.has_csr = 1,
-	.has_guc = 1,
+	.has_uc = 1,
 	.ddb_size = 896,
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index 762f0f2..ffe7fb5a 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -378,7 +378,7 @@ int intel_guc_init_hw(struct intel_guc *guc)
 void intel_guc_sanitize_submission(struct drm_i915_private *dev_priv)
 {
 	/* Verify hardware support */
-	if (!HAS_GUC(dev_priv)) {
+	if (!HAS_UC(dev_priv)) {
 		if (i915.enable_guc_submission > 0)
 			DRM_INFO("Ignoring GuC submission enable, no HW\n");
 		i915.enable_guc_submission = 0;
@@ -446,7 +446,7 @@ void intel_guc_select_fw(struct intel_guc *guc)
 		guc->fw.major_ver_wanted = GLK_FW_MAJOR;
 		guc->fw.minor_ver_wanted = GLK_FW_MINOR;
 	} else {
-		if (HAS_GUC(dev_priv))
+		if (HAS_UC(dev_priv))
 			DRM_ERROR("No GuC FW known for a platform with GuC!\n");
 		return;
 	}
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index 49a6d88..19191b2 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -176,8 +176,7 @@ void intel_huc_select_fw(struct intel_huc *huc)
 		huc->fw.major_ver_wanted = GLK_HUC_FW_MAJOR;
 		huc->fw.minor_ver_wanted = GLK_HUC_FW_MINOR;
 	} else {
-		/* For now, everything with a GuC also has a HuC */
-		if (HAS_GUC(dev_priv))
+		if (HAS_UC(dev_priv))
 			DRM_ERROR("No HuC FW known for a platform with HuC!\n");
 		return;
 	}
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index cacb65f..50bdf2e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5690,7 +5690,7 @@ static void gen9_enable_rc6(struct drm_i915_private *dev_priv)
 	for_each_engine(engine, dev_priv, id)
 		I915_WRITE(RING_MAX_IDLE(engine->mmio_base), 10);
 
-	if (HAS_GUC(dev_priv))
+	if (HAS_UC(dev_priv))
 		I915_WRITE(GUC_MAX_IDLE_COUNT, 0xA);
 
 	I915_WRITE(GEN6_RC_SLEEP, 0);
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 2f1f79b..f126d7e 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -211,7 +211,7 @@ static void fetch_uc_fw(struct drm_i915_private *dev_priv,
 
 void intel_uc_init_fw(struct drm_i915_private *dev_priv)
 {
-	if (!HAS_GUC(dev_priv))
+	if (!HAS_UC(dev_priv))
 		return;
 
 	fetch_uc_fw(dev_priv, &dev_priv->huc.fw);
-- 
1.9.1



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