[Intel-gfx] [PATCH 0/4] Kernel PSR Fix-ups

[Jim Bride]

These patches, along with an upcoming series for IGT, enable our
PSR IGT tests to run reliably once again.  The first change
enables us to run the PSR tests on SKL and KBL RVP platforms,
whose panels have too slow of a setup time when running in their
preferred mode.  The second fixes a minor problem with the way that
we were initializing SRD_CTL that caused us to clobber a bit that we
are not supposed to change in that register on SKL and KBL.  The third
change re-introduces some changes to our link training code to be less
aggressive about changing link state for eDP, because PSR depends on
the link state being the same at PSR exit as it was at PSR entry.
The fourth change greatly increases the reliability of reading the
sink CRC generated by the eDP panel.  

Jim Bride (4):
  drm/i915/edp: Allow alternate fixed mode for eDP if available.
  drm/i915/psr: Clean-up intel_enable_source_psr1()
  drm/i915/edp: Be less aggressive about changing link config on eDP
  drm/i915/psr: Account for sink CRC raciness on some panels

 drivers/gpu/drm/i915/i915_debugfs.c           | 14 +++-
 drivers/gpu/drm/i915/i915_reg.h               |  4 ++
 drivers/gpu/drm/i915/intel_dp.c               | 95 +++++++++++++++++++++++----
 drivers/gpu/drm/i915/intel_dp_link_training.c | 11 +++-
 drivers/gpu/drm/i915/intel_drv.h              |  4 ++
 drivers/gpu/drm/i915/intel_dsi.c              |  2 +-
 drivers/gpu/drm/i915/intel_dvo.c              |  2 +-
 drivers/gpu/drm/i915/intel_lvds.c             |  3 +-
 drivers/gpu/drm/i915/intel_panel.c            |  2 +
 drivers/gpu/drm/i915/intel_psr.c              | 21 +++++-
 10 files changed, 136 insertions(+), 22 deletions(-)

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2.7.4