[Intel-gfx] [RFC] drm/i915: Allow the UMD to configure their own power clock state

[Joonas Lahtinen]

On ti, 2017-05-02 at 15:07 +0000, Oscar Mateo wrote:
> This allows userspace to shutdown slices at will for performance/power reasons
> (because it doesn't have a use for more slices).
> 
> Cc: Dmitry Rogozhkin <dmitry.v.rogozhkin at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>

<SNIP>

> @@ -673,6 +674,11 @@ static int gen8_init_workarounds(struct intel_engine_cs *engine)
>  			    GEN6_WIZ_HASHING_MASK,
>  			    GEN6_WIZ_HASHING_16x4);
>  
> +	/* Allow the UMD to configure their own power clock state */
> +	ret = wa_ring_whitelist_reg(engine, GEN8_R_PWR_CLK_STATE);
> +	if (ret)
> +		return ret;
> +
>  	return 0;
>  }
>  
> @@ -841,6 +847,11 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
>  	if (ret)
>  		return ret;
>  
> +	/* Allow the UMD to configure their own power clock state */
> +	ret = wa_ring_whitelist_reg(engine, GEN8_R_PWR_CLK_STATE);
> +	if (ret)
> +		return ret;

This is not a workaround, so it should be part of the cmd parser and
have an userspace.

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation