[Intel-gfx] [PATCH 12/22] drm/i915: expose _SLICE_MASK GETPARM

[Lionel Landwerlin]

From: Robert Bragg <robert at sixbynine.org>

Enables userspace to determine the number of slices enabled and also
know what specific slices are enabled. This information is required, for
example, to be able to analyse some OA counter reports where the counter
configuration depends on the HW slice configuration.

Signed-off-by: Robert Bragg <robert at sixbynine.org>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Matthew Auld <matthew.auld at intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 12 ++++++++++++
 drivers/gpu/drm/i915/i915_drv.h | 28 ++++++++++++++++++++++++++++
 include/uapi/drm/i915_drm.h     |  3 +++
 3 files changed, 43 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 72fb47a439d2..1ebe0a2b328f 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -358,6 +358,18 @@ static int i915_getparam(struct drm_device *dev, void *data,
 		 */
 		value = 1;
 		break;
+	case I915_PARAM_SLICE_MASK: {
+		const const struct sseu_dev_info *sseu;
+		int ret = i915_mutex_lock_interruptible(&dev_priv->drm);
+		if (ret)
+			return ret;
+
+		sseu = i915_oa_get_sseu(dev_priv, NULL);
+		value = sseu->slice_mask;
+
+		mutex_unlock(&dev_priv->drm.struct_mutex);
+		break;
+	}
 	default:
 		DRM_DEBUG("Unknown parameter %d\n", param->param);
 		return -EINVAL;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a4c47975d149..3733b7433d40 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3454,6 +3454,34 @@ i915_gem_context_lookup_timeline(struct i915_gem_context *ctx,
 int i915_perf_open_ioctl(struct drm_device *dev, void *data,
 			 struct drm_file *file);
 
+/* Decide what sseu configuration should be used. There are 3 cases :
+ *     - If OA is not used, we should use the context's configuration
+ *     - If OA is used but not monitoring a particular context, we should use
+ *       the device's configuration
+ *     - If OA is used and monitoring a particular context, we should the
+ *       monitored context's configuration
+ */
+static inline const struct sseu_dev_info *
+i915_oa_get_sseu(struct drm_i915_private *dev_priv,
+		 struct i915_gem_context *ctx)
+{
+	struct i915_perf_stream *stream;
+
+	lockdep_assert_held(&dev_priv->drm.struct_mutex);
+
+	if (!dev_priv->perf.initialized)
+		return ctx ? &ctx->sseu : &INTEL_INFO(dev_priv)->sseu;
+
+	stream = dev_priv->perf.oa.exclusive_stream;
+	if (!stream)
+		return ctx ? &ctx->sseu : &INTEL_INFO(dev_priv)->sseu;
+
+	if (!stream->ctx)
+		return &INTEL_INFO(dev_priv)->sseu;
+
+	return &stream->ctx->sseu;
+}
+
 /* i915_gem_evict.c */
 int __must_check i915_gem_evict_something(struct i915_address_space *vm,
 					  u64 min_size, u64 alignment,
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index f24a80d2d42e..25695c3d9a76 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -418,6 +418,9 @@ typedef struct drm_i915_irq_wait {
  */
 #define I915_PARAM_HAS_EXEC_CAPTURE	 45
 
+/* Query the mask of slices available for this system */
+#define I915_PARAM_SLICE_MASK		 46
+
 typedef struct drm_i915_getparam {
 	__s32 param;
 	/*
-- 
2.11.0