[Intel-gfx] [PATCH 1/3] drm/i915/guc: Disable send function on fini
Chris Wilson
chris at chris-wilson.co.uk
Fri May 12 15:17:00 UTC 2017
On Fri, May 12, 2017 at 03:02:58PM +0000, Michal Wajdeczko wrote:
> In earlier patch 789a625 we were enabling send function only
> after successful init. For completeness, we should make sure
> that we disable it on fini.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/intel_uc.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> index 07c5658..940a3c9 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -412,8 +412,11 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
>
> if (i915.enable_guc_submission) {
> i915_guc_submission_disable(dev_priv);
> + guc_disable_communication(&dev_priv->guc);
> gen9_disable_guc_interrupts(dev_priv);
> i915_guc_submission_fini(dev_priv);
> + } else {
> + guc_disable_communication(&dev_priv->guc);
> }
Hmm, is the order that sensitive? Do we initialise it in a different
order depending on guc submission? Seems dubious.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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