[Intel-gfx] [PATCH 36/67] drm/i915: Add MMIO helper for 6 ports with different offsets.
Manasi Navare
manasi.d.navare at intel.com
Wed May 17 19:20:34 UTC 2017
On Thu, Apr 06, 2017 at 12:15:32PM -0700, Rodrigo Vivi wrote:
> Also new registers can have different mmio offsets
> per different lane per port.
>
> v2: Use _PICK as PORT3 instead of creating a new
> macro with if per port.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c38c1fd..5777925 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -64,6 +64,10 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define _MMIO_PIPE3(pipe, a, b, c) _MMIO(_PIPE3(pipe, a, b, c))
> #define _PORT3(port, ...) _PICK(port, __VA_ARGS__)
> #define _MMIO_PORT3(pipe, a, b, c) _MMIO(_PORT3(pipe, a, b, c))
> +#define _PORT6(port, ...) _PICK(port, __VA_ARGS__)
Why do we need to define _PORT6() as a separate macro when all it has to do
is _PICK between given ports so we can jsut use _PORT3 and it will pick amongst the
_VA_ARGS_.
Jani/Ville am I correct?
Manasi
> +#define _MMIO_PORT6(port, a, b, c, d, e, f) _MMIO(_PORT6(port, a, b, c, d, e, f))
> +#define _MMIO_PORT6_LN(port, ln, a0, a1, b, c, d, e, f) \
> + _MMIO(_PORT6(port, a0, b, c, d, e, f) + (ln * (a1 - a0)))
> #define _PHY3(phy, ...) _PICK(phy, __VA_ARGS__)
> #define _MMIO_PHY3(phy, a, b, c) _MMIO(_PHY3(phy, a, b, c))
>
> --
> 1.9.1
>
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