[Intel-gfx] [PATCH] drm/i915: Use a cached mapping for the physical HWS

Chris Wilson chris at chris-wilson.co.uk
Fri May 26 09:16:01 UTC 2017


On Fri, May 26, 2017 at 10:18:30AM +0200, Daniel Vetter wrote:
> On Mon, May 22, 2017 at 10:13:44AM +0100, Chris Wilson wrote:
> > On Mon, May 22, 2017 at 10:55:01AM +0200, Daniel Vetter wrote:
> > > On Wed, May 17, 2017 at 02:02:50PM +0100, Chris Wilson wrote:
> > > > Older gen use a physical address for the hardware status page, for which
> > > > we use cache-coherent writes. As the writes are into the cpu cache, we use
> > > > a normal WB mapped page to read the HWS, used for our seqno tracking.
> > > > 
> > > > Anecdotally, I observed lost breadcrumbs writes into the HWS on i965gm,
> > > > which so far have not reoccurred with this patch. How reliable that
> > > > evidence is remains to be seen.
> > > > 
> > > > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > > 
> > > dma is assumed to be coherent, so this should give you the same thing in
> > > the end.
> > 
> > Hmm, DMA historically hasn't been coherent, to get coherency required
> > UC - being able to snoop was an ability of the GMCH, I thought. Looking
> > at drivers/base/dma-coherent.c it is allocating UC (WC if you are
> > lucky) from a device region, though I'm lost working out how the dynamic
> > allocaton is treated.
> 
> Yes, gpu dma wasn't coherent, but x86 dma api always assumed that
> everything is coherent (since for non-gpus that was the case). At least
> that's how I thought things worked.

But it can only be coherent by disabling the cpu cache for that range. I
think Broadwell is the earliest that allowed pci-e devices to write into
the CPU cache (specifically to support 10G nic iirc), but I can't
remember if that came to pass.
 
> > > Except that dma_map_page can use bounce buffers, whereas
> > > dma_alloc_coherent will make sure you're not doing that.
> > 
> > Hmm, on these machines we don't have DMAR, we really should be feeding
> > in physical addresses. That was probably being too polite. Fancy
> > without?
> 
> Not sure what you mean ... page_to_pfn, plus comment?

See v3, just feed in the physical address of the page (and not the
kernel's page_address()) which is just its pfn << PAGE_SHIFT. Completely
avoid passing it a dma mapped address, just in case it does something.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre


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