[Intel-gfx] [PATCH 3/3] RFC drm/i915: Don't increase the BW when WA is not required.

[Mahesh Kumar]

Hi,

memory bandwidth WA is not applicable for GEN10 but below WA is needed 
for CNL-A.

-Mahesh

On Saturday 27 May 2017 04:53 AM, Rodrigo Vivi wrote:
> Based on patch submited to intel-gfx:
> "drm/i915/cnl: don't apply the GEN9/CNL:A WM WAs to CNL:B+"
> and subsequential tests on CNL, it seems that
> this part is not required if we are not applying WA#0893.
>
> Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>   drivers/gpu/drm/i915/intel_pm.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 919235c..85d9705 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4356,7 +4356,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
>   	res_lines = div_round_up_fixed16(selected_result,
>   					 plane_blocks_per_line);
>   
> -	if (level >= 1 && level <= 7) {
> +	if (NEEDS_WaIncreaseMemoryBW(dev_priv) && level >= 1 && level <= 7) {
>   		if (y_tiled) {
>   			res_blocks += fixed_16_16_to_u32_round_up(y_tile_minimum);
>   			res_lines += y_min_scanlines;