[Intel-gfx] [PATCH 1/2] drm/i915/guc: Get rid of the enable_guc_loading module parameter
Oscar Mateo
oscar.mateo at intel.com
Wed May 31 08:58:42 UTC 2017
On 05/18/2017 05:41 PM, Michal Wajdeczko wrote:
> On Fri, May 05, 2017 at 01:23:17PM +0000, Oscar Mateo wrote:
>> The decission to enable GuC loading shouldn't be left to the user.
>> Provided the HW supports the GuC, there are only two reasons to load it:
>>
>> - The user has requested GuC submission.
>> - We have a HuC firmware available (so we need the GuC to validate it).
>>
>> We leave the enable_guc_submission parameter untouched ("auto", "never",
>> "if supported", "required") but make its behavior a little bit more
>> consistent. Also, if not really required, we do not try to fetch any
>> firmware.
>>
>> Cc: Anusha Srivatsa <anusha.srivatsa at intel.com>
>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
>> Cc: Chris Wilson <chris at chris-wilson.co.uk>
>> Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_debugfs.c | 10 ++++--
>> drivers/gpu/drm/i915/i915_drv.c | 2 +-
>> drivers/gpu/drm/i915/i915_drv.h | 16 +++++----
>> drivers/gpu/drm/i915/i915_gem_context.c | 2 +-
>> drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
>> drivers/gpu/drm/i915/i915_irq.c | 2 +-
>> drivers/gpu/drm/i915/i915_params.c | 6 ----
>> drivers/gpu/drm/i915/i915_params.h | 2 --
>> drivers/gpu/drm/i915/intel_guc_loader.c | 48 +++++++++++++++++++++++----
>> drivers/gpu/drm/i915/intel_huc.c | 5 +--
>> drivers/gpu/drm/i915/intel_uc.c | 58 +++++++++------------------------
>> drivers/gpu/drm/i915/intel_uc.h | 4 +--
>> drivers/gpu/drm/i915/intel_uncore.c | 3 +-
>> 13 files changed, 82 insertions(+), 78 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
>> index 870c470..e030b41 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -2366,8 +2366,10 @@ static int i915_huc_load_status_info(struct seq_file *m, void *data)
>> struct drm_i915_private *dev_priv = node_to_i915(m->private);
>> struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
>>
>> - if (!HAS_HUC_UCODE(dev_priv))
>> + if (!HAS_GUC(dev_priv)) {
>> + seq_puts(m, "No HuC support in HW\n");
>> return 0;
>> + }
>>
>> seq_puts(m, "HuC firmware status:\n");
>> seq_printf(m, "\tpath: %s\n", huc_fw->path);
>> @@ -2399,8 +2401,10 @@ static int i915_guc_load_status_info(struct seq_file *m, void *data)
>> struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;
>> u32 tmp, i;
>>
>> - if (!HAS_GUC_UCODE(dev_priv))
>> + if (!HAS_GUC(dev_priv)) {
>> + seq_puts(m, "No GuC support in HW\n");
>> return 0;
>> + }
>>
>> seq_printf(m, "GuC firmware status:\n");
>> seq_printf(m, "\tpath: %s\n",
>> @@ -2504,7 +2508,7 @@ static int i915_guc_info(struct seq_file *m, void *data)
>>
>> if (!guc->execbuf_client) {
>> seq_printf(m, "GuC submission %s\n",
>> - HAS_GUC_SCHED(dev_priv) ?
>> + HAS_GUC(dev_priv) ?
>> "disabled" :
>> "not supported");
>> return 0;
>> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
>> index 72fb47a..006ed91 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.c
>> +++ b/drivers/gpu/drm/i915/i915_drv.c
>> @@ -996,7 +996,7 @@ static void intel_sanitize_options(struct drm_i915_private *dev_priv)
>> i915.semaphores = intel_sanitize_semaphores(dev_priv, i915.semaphores);
>> DRM_DEBUG_DRIVER("use GPU semaphores? %s\n", yesno(i915.semaphores));
>>
>> - intel_uc_sanitize_options(dev_priv);
>> + intel_guc_sanitize_submission(dev_priv);
>> }
>>
>> /**
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index b20ed16..5d00120 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -2921,15 +2921,17 @@ static inline struct scatterlist *__sg_next(struct scatterlist *sg)
>> #define HAS_RUNTIME_PM(dev_priv) ((dev_priv)->info.has_runtime_pm)
>> #define HAS_64BIT_RELOC(dev_priv) ((dev_priv)->info.has_64bit_reloc)
>>
>> +#define HAS_GUC(dev_priv) ((dev_priv)->info.has_guc)
>> +#define HAS_GUC_UCODE(dev_priv) ((dev_priv)->guc.fw.path != NULL)
>> +#define HAS_HUC_UCODE(dev_priv) ((dev_priv)->huc.fw.path != NULL)
>> +
>> /*
>> - * For now, anything with a GuC requires uCode loading, and then supports
>> - * command submission once loaded. But these are logically independent
>> - * properties, so we have separate macros to test them.
>> + * Only two things require us to load the GuC firmware: either we want
>> + * to enable GuC submission or we need it to to validate a HuC firmware
>> */
>> -#define HAS_GUC(dev_priv) ((dev_priv)->info.has_guc)
>> -#define HAS_GUC_UCODE(dev_priv) (HAS_GUC(dev_priv))
>> -#define HAS_GUC_SCHED(dev_priv) (HAS_GUC(dev_priv))
>> -#define HAS_HUC_UCODE(dev_priv) (HAS_GUC(dev_priv))
>> +#define NEEDS_GUC_LOADING(dev_priv) \
>> + (HAS_GUC(dev_priv) && \
>> + (i915.enable_guc_submission || HAS_HUC_UCODE(dev_priv)))
>>
>> #define HAS_RESOURCE_STREAMER(dev_priv) ((dev_priv)->info.has_resource_streamer)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
>> index 31a73c3..a9f825b 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_context.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
>> @@ -237,7 +237,7 @@ static u32 default_desc_template(const struct drm_i915_private *i915,
>> * present or not in use we still need a small bias as ring wraparound
>> * at offset 0 sometimes hangs. No idea why.
>> */
>> - if (HAS_GUC(dev_priv) && i915.enable_guc_loading)
>> + if (NEEDS_GUC_LOADING(dev_priv))
>> ctx->ggtt_offset_bias = GUC_WOPCM_TOP;
>> else
>> ctx->ggtt_offset_bias = I915_GTT_PAGE_SIZE;
>> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> index 8bab4ae..283d7e5 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> @@ -2897,7 +2897,7 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
>> * currently don't have any bits spare to pass in this upper
>> * restriction!
>> */
>> - if (HAS_GUC(dev_priv) && i915.enable_guc_loading) {
>> + if (NEEDS_GUC_LOADING(dev_priv)) {
>> ggtt->base.total = min_t(u64, ggtt->base.total, GUC_GGTT_TOP);
>> ggtt->mappable_end = min(ggtt->mappable_end, ggtt->base.total);
>> }
>> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>> index c99f51c..75cd0a9 100644
>> --- a/drivers/gpu/drm/i915/i915_irq.c
>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>> @@ -4240,7 +4240,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
>> for (i = 0; i < MAX_L3_SLICES; ++i)
>> dev_priv->l3_parity.remap_info[i] = NULL;
>>
>> - if (HAS_GUC_SCHED(dev_priv))
>> + if (NEEDS_GUC_LOADING(dev_priv))
>> dev_priv->pm_guc_events = GEN9_GUC_TO_HOST_INT_EVENT;
>>
>> /* Let's track the enabled rps events */
>> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
>> index b6a7e36..f90b7c1 100644
>> --- a/drivers/gpu/drm/i915/i915_params.c
>> +++ b/drivers/gpu/drm/i915/i915_params.c
>> @@ -56,7 +56,6 @@ struct i915_params i915 __read_mostly = {
>> .verbose_state_checks = 1,
>> .nuclear_pageflip = 0,
>> .edp_vswing = 0,
>> - .enable_guc_loading = 0,
>> .enable_guc_submission = 0,
>> .guc_log_level = -1,
>> .guc_firmware_path = NULL,
>> @@ -218,11 +217,6 @@ struct i915_params i915 __read_mostly = {
>> "(0=use value from vbt [default], 1=low power swing(200mV),"
>> "2=default swing(400mV))");
>>
>> -module_param_named_unsafe(enable_guc_loading, i915.enable_guc_loading, int, 0400);
>> -MODULE_PARM_DESC(enable_guc_loading,
>> - "Enable GuC firmware loading "
>> - "(-1=auto, 0=never [default], 1=if available, 2=required)");
>> -
>> module_param_named_unsafe(enable_guc_submission, i915.enable_guc_submission, int, 0400);
>> MODULE_PARM_DESC(enable_guc_submission,
>> "Enable GuC submission "
>> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
>> index 34148cc..33e12f6 100644
>> --- a/drivers/gpu/drm/i915/i915_params.h
>> +++ b/drivers/gpu/drm/i915/i915_params.h
>> @@ -43,7 +43,6 @@
>> func(int, disable_power_well); \
>> func(int, enable_ips); \
>> func(int, invert_brightness); \
>> - func(int, enable_guc_loading); \
>> func(int, enable_guc_submission); \
>> func(int, guc_log_level); \
>> func(char *, guc_firmware_path); \
>> @@ -78,4 +77,3 @@ struct i915_params {
>> extern struct i915_params i915 __read_mostly;
>>
>> #endif
>> -
>> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
>> index d9045b6..762f0f2 100644
>> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
>> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
>> @@ -375,13 +375,48 @@ int intel_guc_init_hw(struct intel_guc *guc)
>> return 0;
>> }
>>
>> +void intel_guc_sanitize_submission(struct drm_i915_private *dev_priv)
>> +{
>> + /* Verify hardware support */
>> + if (!HAS_GUC(dev_priv)) {
>> + if (i915.enable_guc_submission > 0)
>> + DRM_INFO("Ignoring GuC submission enable, no HW\n");
>> + i915.enable_guc_submission = 0;
>> + return;
>> + }
>> +
>> + /* Verify firmware support */
>> + if (!HAS_GUC_UCODE(dev_priv)) {
>> + if (i915.enable_guc_submission == 1) {
> Shouldn't we check here against > 0 ?
>
A 2 is "required", so we are letting it continue for now and it will
fail later due to the lack of firmware, instead of papering over it.
>> + DRM_INFO("Ignoring GuC submission enable, no FW\n");
>> + i915.enable_guc_submission = 0;
>> + return;
>> + }
>> +
>> + if (i915.enable_guc_submission < 0) {
>> + i915.enable_guc_submission = 0;
>> + return;
>> + }
>> +
>> + /*
>> + * If "required" (> 1), let it continue and we will fail later
>> + * due to the lack of firmware
>> + */
Ditto.
>> + }
>> +
>> + /*
>> + * A negative value means "use platform default" (enabled if we have
>> + * survived to get here)
>> + */
>> + if (i915.enable_guc_submission < 0)
>> + i915.enable_guc_submission = 1;
>> +}
>> +
>> /**
>> * intel_guc_select_fw() - selects GuC firmware for loading
>> * @guc: intel_guc struct
>> - *
>> - * Return: zero when we know firmware, non-zero in other case
>> */
>> -int intel_guc_select_fw(struct intel_guc *guc)
>> +void intel_guc_select_fw(struct intel_guc *guc)
>> {
>> struct drm_i915_private *dev_priv = guc_to_i915(guc);
>>
>> @@ -411,9 +446,8 @@ int intel_guc_select_fw(struct intel_guc *guc)
>> guc->fw.major_ver_wanted = GLK_FW_MAJOR;
>> guc->fw.minor_ver_wanted = GLK_FW_MINOR;
>> } else {
>> - DRM_ERROR("No GuC firmware known for platform with GuC!\n");
>> - return -ENOENT;
>> + if (HAS_GUC(dev_priv))
> This check can be done at the very top of this function, or by the caller
>
Will do.
>> + DRM_ERROR("No GuC FW known for a platform with GuC!\n");
> If we use %s then we can share message with the HuC function below:
>
> DRM_ERROR("No FW know for a platform with %s!\n",
> intel_uc_fw_type_repr(INTEL_UC_FW_TYPE_GUC));
>
Hmmm... but in this case we know we are talking about the GuC (we are
intel_*guc*_loader after all). Same for the HuC function. Do you think
this is really needed?
>> + return;
>> }
>> -
>> - return 0;
>> }
>> diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
>> index 88b4cf3..49a6d88 100644
>> --- a/drivers/gpu/drm/i915/intel_huc.c
>> +++ b/drivers/gpu/drm/i915/intel_huc.c
>> @@ -176,7 +176,9 @@ void intel_huc_select_fw(struct intel_huc *huc)
>> huc->fw.major_ver_wanted = GLK_HUC_FW_MAJOR;
>> huc->fw.minor_ver_wanted = GLK_HUC_FW_MINOR;
>> } else {
>> - DRM_ERROR("No HuC firmware known for platform with HuC!\n");
>> + /* For now, everything with a GuC also has a HuC */
>> + if (HAS_GUC(dev_priv))
>> + DRM_ERROR("No HuC FW known for a platform with HuC!\n");
>> return;
>> }
>> }
>> @@ -275,4 +277,3 @@ void intel_guc_auth_huc(struct drm_i915_private *dev_priv)
>> out:
>> i915_vma_unpin(vma);
>> }
>> -
>> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
>> index 7fd75ca..2f1f79b 100644
>> --- a/drivers/gpu/drm/i915/intel_uc.c
>> +++ b/drivers/gpu/drm/i915/intel_uc.c
>> @@ -60,44 +60,13 @@ static int __intel_uc_reset_hw(struct drm_i915_private *dev_priv)
>> return ret;
>> }
>>
>> -void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
>> -{
>> - if (!HAS_GUC(dev_priv)) {
>> - if (i915.enable_guc_loading > 0 ||
>> - i915.enable_guc_submission > 0)
>> - DRM_INFO("Ignoring GuC options, no hardware\n");
>> -
>> - i915.enable_guc_loading = 0;
>> - i915.enable_guc_submission = 0;
>> - return;
>> - }
>> -
>> - /* A negative value means "use platform default" */
>> - if (i915.enable_guc_loading < 0)
>> - i915.enable_guc_loading = HAS_GUC_UCODE(dev_priv);
>> -
>> - /* Verify firmware version */
>> - if (i915.enable_guc_loading) {
>> - if (HAS_HUC_UCODE(dev_priv))
>> - intel_huc_select_fw(&dev_priv->huc);
>> -
>> - if (intel_guc_select_fw(&dev_priv->guc))
>> - i915.enable_guc_loading = 0;
>> - }
>> -
>> - /* Can't enable guc submission without guc loaded */
>> - if (!i915.enable_guc_loading)
>> - i915.enable_guc_submission = 0;
>> -
>> - /* A negative value means "use platform default" */
>> - if (i915.enable_guc_submission < 0)
>> - i915.enable_guc_submission = HAS_GUC_SCHED(dev_priv);
>> -}
>> -
>> void intel_uc_init_early(struct drm_i915_private *dev_priv)
>> {
>> struct intel_guc *guc = &dev_priv->guc;
>>
>> + intel_guc_select_fw(&dev_priv->guc);
>> + intel_huc_select_fw(&dev_priv->huc);
>> +
> Wrap above inside "if (HAS_GUC(dev_priv))" ?
Yes, will do.
>> mutex_init(&guc->send_mutex);
>> guc->send = intel_guc_send_nop;
>> }
>> @@ -242,6 +211,9 @@ static void fetch_uc_fw(struct drm_i915_private *dev_priv,
>>
>> void intel_uc_init_fw(struct drm_i915_private *dev_priv)
>> {
>> + if (!HAS_GUC(dev_priv))
>> + return;
>> +
>> fetch_uc_fw(dev_priv, &dev_priv->huc.fw);
>> fetch_uc_fw(dev_priv, &dev_priv->guc.fw);
>> }
>> @@ -269,7 +241,7 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv)
>> struct intel_guc *guc = &dev_priv->guc;
>> int ret, attempts;
>>
>> - if (!i915.enable_guc_loading)
>> + if (!NEEDS_GUC_LOADING(dev_priv))
>> return 0;
>>
>> guc_disable_communication(guc);
>> @@ -357,22 +329,22 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv)
>> i915_ggtt_disable_guc(dev_priv);
>>
>> DRM_ERROR("GuC init failed\n");
>> - if (i915.enable_guc_loading > 1 || i915.enable_guc_submission > 1)
>> + if (i915.enable_guc_submission > 1) {
>> + DRM_NOTE("GuC is required, so marking the GPU as wedged\n");
>> ret = -EIO;
>> - else
>> - ret = 0;
>> -
>> - if (i915.enable_guc_submission) {
>> - i915.enable_guc_submission = 0;
>> + } else if (i915.enable_guc_submission == 1) {
>> DRM_NOTE("Falling back from GuC submission to execlist mode\n");
>> - }
>> + i915.enable_guc_submission = 0;
> Btw, I'm not sure that it is ok to change params outside of the sanitize function
>
Hmmmm... we were already doing that before this patch. I guess we could
have a runtime variable (has GuC init failed?) if we answer some
questions (do we want to retry the init after a reset?).
>> + ret = 0;
>> + } else
>> + ret = 0;
>>
>> return ret;
>> }
>>
>> void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
>> {
>> - if (!i915.enable_guc_loading)
>> + if (!NEEDS_GUC_LOADING(dev_priv))
>> return;
>>
>> if (i915.enable_guc_submission) {
>> diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
>> index 1e0eecd..2da4845 100644
>> --- a/drivers/gpu/drm/i915/intel_uc.h
>> +++ b/drivers/gpu/drm/i915/intel_uc.h
>> @@ -220,7 +220,6 @@ struct intel_huc {
>> };
>>
>> /* intel_uc.c */
>> -void intel_uc_sanitize_options(struct drm_i915_private *dev_priv);
>> void intel_uc_init_early(struct drm_i915_private *dev_priv);
>> void intel_uc_init_fw(struct drm_i915_private *dev_priv);
>> void intel_uc_fini_fw(struct drm_i915_private *dev_priv);
>> @@ -235,13 +234,14 @@ static inline int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 l
>> }
>>
>> /* intel_guc_loader.c */
>> -int intel_guc_select_fw(struct intel_guc *guc);
>> +void intel_guc_select_fw(struct intel_guc *guc);
>> int intel_guc_init_hw(struct intel_guc *guc);
>> int intel_guc_suspend(struct drm_i915_private *dev_priv);
>> int intel_guc_resume(struct drm_i915_private *dev_priv);
>> u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
>>
>> /* i915_guc_submission.c */
>> +void intel_guc_sanitize_submission(struct drm_i915_private *dev_priv);
> For functions with "intel_guc" we are passing guc instead of dev_priv
>
>
Not always, from what I can see, and in this case it makes little sense
(I don't need to access guc, and all other sanitize functions take
dev_priv).
> Regards,
> Michal
>
Thanks for the review,
Oscar
>> int i915_guc_submission_init(struct drm_i915_private *dev_priv);
>> int i915_guc_submission_enable(struct drm_i915_private *dev_priv);
>> int i915_guc_wq_reserve(struct drm_i915_gem_request *rq);
>> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
>> index aa9d306..7084088 100644
>> --- a/drivers/gpu/drm/i915/intel_uncore.c
>> +++ b/drivers/gpu/drm/i915/intel_uncore.c
>> @@ -1762,8 +1762,7 @@ int intel_guc_reset(struct drm_i915_private *dev_priv)
>> {
>> int ret;
>>
>> - if (!HAS_GUC(dev_priv))
>> - return -EINVAL;
>> + GEM_BUG_ON(!HAS_UC(dev_priv));
>>
>> intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
>> ret = gen6_hw_domain_reset(dev_priv, GEN9_GRDOM_GUC);
>> --
>> 1.9.1
>>
>> _______________________________________________
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>> Intel-gfx at lists.freedesktop.org
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>>
>>
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