[Intel-gfx] [PATCH 05/15] drm/i915: align the vma start to the largest gtt page size

[Chris Wilson]

On Wed, May 31, 2017 at 07:52:00PM +0100, Matthew Auld wrote:
> When inserting into a 48bit PPGTT we should the align the vma start
> address to the required page size boundary, to guarantee we use said
> page size in the gtt. If we are dealing with multiple page-sizes, we
> can't guarantee anything and just align to the largest. For soft pinning
> we don't force any alignment.
> 
> Signed-off-by: Matthew Auld <matthew.auld at intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/i915_vma.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index 1aba47024656..c355ccb01872 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -485,6 +485,18 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
>  		if (ret)
>  			goto err_unpin;
>  	} else {
> +		if (i915_vm_is_48bit(vma->vm) &&

I would use end > 4G here. As that encapsulates the i915_vm_is_48bit()
test and avoids us applying the extra padding to objects that must be
tightly packed into the low 32bits.

> +		    obj->mm.page_sizes.sg > I915_GTT_PAGE_SIZE) {
> +			unsigned int page_alignment = obj->mm.page_sizes.sg;
> +
> +			/* Align to the largest and hope for the best */
> +			if (!is_power_of_2(page_alignment))
> +				page_alignment = BIT(fls64(page_alignment)-1);

fls64() - 1 == ilog2()

BIT(ilog2()) == roundup_pow_of_two()

linux/log2.h is your friend.

> +
> +			alignment = max_t(typeof(alignment), alignment,
> +					  page_alignment);

Make page_alignment be u64 and be happy.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre