[Intel-gfx] [PATCH 4/5] drm/i915/guc: Increase wait timeout for doorbell release status update
Sagar Arun Kamble
sagar.a.kamble at intel.com
Mon Nov 6 05:43:26 UTC 2017
On 11/5/2017 9:25 PM, Michal Wajdeczko wrote:
> On Sun, 05 Nov 2017 14:39:42 +0100, Sagar Arun Kamble
> <sagar.a.kamble at intel.com> wrote:
>
>> Current wait timeout of 10us is very tight as seen on SKL/KBL randomly
>> for pm_rpm at basic-pci-d3-state. Increase it to 50us.
>>
>> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
>> Cc: Chris Wilson <chris at chris-wilson.co.uk>
>> Cc: Michał Winiarski <michal.winiarski at intel.com>
>> Cc: Michel Thierry <michel.thierry at intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
>> Cc: Arkadiusz Hiler <arkadiusz.hiler at intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_guc_submission.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c
>> b/drivers/gpu/drm/i915/i915_guc_submission.c
>> index 21f7fa7..3914415 100644
>> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
>> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
>> @@ -222,7 +222,8 @@ static int __destroy_doorbell(struct
>> i915_guc_client *client, bool notify_guc)
>> /* Doorbell release flow requires that we wait for
>> GEN8_DRB_VALID bit
>> * to go to zero after updating db_status before we call the GuC to
>> * release the doorbell */
>> - if (wait_for_us(!(I915_READ(GEN8_DRBREGL(db_id)) &
>> GEN8_DRB_VALID), 10))
>> + if (wait_for_us(!(I915_READ(GEN8_DRBREGL(db_id)) & GEN8_DRB_VALID),
>> + 50))
>
> Can we use intel_wait_for_register() here ?
Yes. Since wait timeout is expected to be in the order of uS (50us for
now) will be using __intel_wait_for_register_fw.
+ if (__intel_wait_for_register_fw(dev_priv, GEN8_DRBREGL(db_id),
GEN8_DRB_VALID, 0,
+ 50, 1, NULL))
Is this fine (with slow timeout of 1ms)?
>> WARN_ONCE(true, "Doorbell never became invalid after
>> disable\n");
>> if (notify_guc)
More information about the Intel-gfx
mailing list