[Intel-gfx] [PATCH] drm/i915: Restore the wait for idle engine after flushing interrupts

Chris Wilson chris at chris-wilson.co.uk
Fri Nov 10 12:12:45 UTC 2017


Quoting Chris Wilson (2017-11-10 12:06:59)
> Quoting Mika Kuoppala (2017-11-10 12:00:38)
> > Just pondering here what was the key nonidleness key that
> > lead to this. What raced?
> 
> Still pondering myself. This is basically to shut CI up so the random
> fails stop inflicting the confusion of false positives.
> 
> My guess is that it is a residual ELSP tasklet and the ring registers
> taking a moment to idle. But I am not sure, on the way here we gave it
> long enough to settle with no new work coming in, so it should not need
> another 10ms on top of the 200ms it already had!

One thing to note is that it seems limited to that one bsw, and either
vcs or vecs rings. Being slow and under-cored (i.e. scheduler delays)
might just be the explanation. :|
-Chris


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