[Intel-gfx] [PATCH v2 4/9] drm/i915: fix register naming

Lionel Landwerlin lionel.g.landwerlin at intel.com
Fri Nov 10 16:24:13 UTC 2017


On 10/11/17 11:11, Matthew Auld wrote:
> On 2 November 2017 at 16:29, Lionel Landwerlin
> <lionel.g.landwerlin at intel.com> wrote:
>> This name was added with the whitelisting of registers for building up OA
>> configs. It is contained in a range gen8 whitelist :
>>
>>     addr >= RPM_CONFIG0.reg && addr <= NOA_CONFIG(8).reg
>>
>> Hence why the name isn't used anywhere.
>>
>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_reg.h | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index ee4941a1df20..d27092ec4f74 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -1118,7 +1118,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
>>   #define RPM_CONFIG1        _MMIO(0x0D04)
>>
>>   /* RPC unit config (Gen8+) */
>> -#define RPM_CONFIG         _MMIO(0x0D08)
>> +#define RPC_CONFIG         _MMIO(0x0D08)
> Wait, is it RPC or RCP, the spec is calling it the RCPunit, with the
> register being RCPCONFIG...
>
Looks like I can't read or write :(
Resending with a fix, thanks a lot.


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