[Intel-gfx] [PATCH 2/7] drm/i915/perf: add support for Coffeelake GT3
Ewelina Musial
ewelina.musial at intel.com
Mon Nov 13 07:18:45 UTC 2017
On Fri, Nov 10, 2017 at 07:08:40PM +0000, Lionel Landwerlin wrote:
> We can enable GT3 as well as GT2.
>
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
> Reviewed-by: Matthew Auld <matthew.auld at intel.com>
Reviewed-by: Ewelina Musial <ewelina.musial at intel.com>
> ---
> drivers/gpu/drm/i915/Makefile | 3 +-
> drivers/gpu/drm/i915/i915_drv.h | 2 +
> drivers/gpu/drm/i915/i915_oa_cflgt3.c | 109 ++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_oa_cflgt3.h | 34 +++++++++++
> drivers/gpu/drm/i915/i915_perf.c | 3 +
> 5 files changed, 150 insertions(+), 1 deletion(-)
> create mode 100644 drivers/gpu/drm/i915/i915_oa_cflgt3.c
> create mode 100644 drivers/gpu/drm/i915/i915_oa_cflgt3.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 177404462386..58463bd94b4c 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -163,7 +163,8 @@ i915-y += i915_perf.o \
> i915_oa_kblgt2.o \
> i915_oa_kblgt3.o \
> i915_oa_glk.o \
> - i915_oa_cflgt2.o
> + i915_oa_cflgt2.o \
> + i915_oa_cflgt3.o
>
> ifeq ($(CONFIG_DRM_I915_GVT),y)
> i915-y += intel_gvt.o
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 40012b6daea2..9f26c34e0e52 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3058,6 +3058,8 @@ intel_info(const struct drm_i915_private *dev_priv)
> (INTEL_DEVID(dev_priv) & 0x00F0) == 0x00A0)
> #define IS_CFL_GT2(dev_priv) (IS_COFFEELAKE(dev_priv) && \
> (dev_priv)->info.gt == 2)
> +#define IS_CFL_GT3(dev_priv) (IS_COFFEELAKE(dev_priv) && \
> + (dev_priv)->info.gt == 3)
>
> #define IS_ALPHA_SUPPORT(intel_info) ((intel_info)->is_alpha_support)
>
> diff --git a/drivers/gpu/drm/i915/i915_oa_cflgt3.c b/drivers/gpu/drm/i915/i915_oa_cflgt3.c
> new file mode 100644
> index 000000000000..42ff06fe54a3
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/i915_oa_cflgt3.c
> @@ -0,0 +1,109 @@
> +/*
> + * Autogenerated file by GPU Top : https://github.com/rib/gputop
> + * DO NOT EDIT manually!
> + *
> + *
> + * Copyright (c) 2015 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#include <linux/sysfs.h>
> +
> +#include "i915_drv.h"
> +#include "i915_oa_cflgt3.h"
> +
> +static const struct i915_oa_reg b_counter_config_test_oa[] = {
> + { _MMIO(0x2740), 0x00000000 },
> + { _MMIO(0x2744), 0x00800000 },
> + { _MMIO(0x2714), 0xf0800000 },
> + { _MMIO(0x2710), 0x00000000 },
> + { _MMIO(0x2724), 0xf0800000 },
> + { _MMIO(0x2720), 0x00000000 },
> + { _MMIO(0x2770), 0x00000004 },
> + { _MMIO(0x2774), 0x00000000 },
> + { _MMIO(0x2778), 0x00000003 },
> + { _MMIO(0x277c), 0x00000000 },
> + { _MMIO(0x2780), 0x00000007 },
> + { _MMIO(0x2784), 0x00000000 },
> + { _MMIO(0x2788), 0x00100002 },
> + { _MMIO(0x278c), 0x0000fff7 },
> + { _MMIO(0x2790), 0x00100002 },
> + { _MMIO(0x2794), 0x0000ffcf },
> + { _MMIO(0x2798), 0x00100082 },
> + { _MMIO(0x279c), 0x0000ffef },
> + { _MMIO(0x27a0), 0x001000c2 },
> + { _MMIO(0x27a4), 0x0000ffe7 },
> + { _MMIO(0x27a8), 0x00100001 },
> + { _MMIO(0x27ac), 0x0000ffe7 },
> +};
> +
> +static const struct i915_oa_reg flex_eu_config_test_oa[] = {
> +};
> +
> +static const struct i915_oa_reg mux_config_test_oa[] = {
> + { _MMIO(0x9840), 0x00000080 },
> + { _MMIO(0x9888), 0x11810000 },
> + { _MMIO(0x9888), 0x07810013 },
> + { _MMIO(0x9888), 0x1f810000 },
> + { _MMIO(0x9888), 0x1d810000 },
> + { _MMIO(0x9888), 0x1b930040 },
> + { _MMIO(0x9888), 0x07e54000 },
> + { _MMIO(0x9888), 0x1f908000 },
> + { _MMIO(0x9888), 0x11900000 },
> + { _MMIO(0x9888), 0x37900000 },
> + { _MMIO(0x9888), 0x53900000 },
> + { _MMIO(0x9888), 0x45900000 },
> + { _MMIO(0x9888), 0x33900000 },
> +};
> +
> +static ssize_t
> +show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf)
> +{
> + return sprintf(buf, "1\n");
> +}
> +
> +void
> +i915_perf_load_test_config_cflgt3(struct drm_i915_private *dev_priv)
> +{
> + strncpy(dev_priv->perf.oa.test_config.uuid,
> + "577e8e2c-3fa0-4875-8743-3538d585e3b0",
> + UUID_STRING_LEN);
> + dev_priv->perf.oa.test_config.id = 1;
> +
> + dev_priv->perf.oa.test_config.mux_regs = mux_config_test_oa;
> + dev_priv->perf.oa.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa);
> +
> + dev_priv->perf.oa.test_config.b_counter_regs = b_counter_config_test_oa;
> + dev_priv->perf.oa.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa);
> +
> + dev_priv->perf.oa.test_config.flex_regs = flex_eu_config_test_oa;
> + dev_priv->perf.oa.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa);
> +
> + dev_priv->perf.oa.test_config.sysfs_metric.name = "577e8e2c-3fa0-4875-8743-3538d585e3b0";
> + dev_priv->perf.oa.test_config.sysfs_metric.attrs = dev_priv->perf.oa.test_config.attrs;
> +
> + dev_priv->perf.oa.test_config.attrs[0] = &dev_priv->perf.oa.test_config.sysfs_metric_id.attr;
> +
> + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.name = "id";
> + dev_priv->perf.oa.test_config.sysfs_metric_id.attr.mode = 0444;
> + dev_priv->perf.oa.test_config.sysfs_metric_id.show = show_test_oa_id;
> +}
> diff --git a/drivers/gpu/drm/i915/i915_oa_cflgt3.h b/drivers/gpu/drm/i915/i915_oa_cflgt3.h
> new file mode 100644
> index 000000000000..c13b5aac01b9
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/i915_oa_cflgt3.h
> @@ -0,0 +1,34 @@
> +/*
> + * Autogenerated file by GPU Top : https://github.com/rib/gputop
> + * DO NOT EDIT manually!
> + *
> + *
> + * Copyright (c) 2015 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#ifndef __I915_OA_CFLGT3_H__
> +#define __I915_OA_CFLGT3_H__
> +
> +extern void i915_perf_load_test_config_cflgt3(struct drm_i915_private *dev_priv);
> +
> +#endif
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 45aef15b9e7c..7271debe0417 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -207,6 +207,7 @@
> #include "i915_oa_kblgt3.h"
> #include "i915_oa_glk.h"
> #include "i915_oa_cflgt2.h"
> +#include "i915_oa_cflgt3.h"
>
> /* HW requires this to be a power of two, between 128k and 16M, though driver
> * is currently generally designed assuming the largest 16M size is used such
> @@ -2934,6 +2935,8 @@ void i915_perf_register(struct drm_i915_private *dev_priv)
> } else if (IS_COFFEELAKE(dev_priv)) {
> if (IS_CFL_GT2(dev_priv))
> i915_perf_load_test_config_cflgt2(dev_priv);
> + if (IS_CFL_GT3(dev_priv))
> + i915_perf_load_test_config_cflgt3(dev_priv);
> }
>
> if (dev_priv->perf.oa.test_config.id == 0)
> --
> 2.15.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
More information about the Intel-gfx
mailing list