[Intel-gfx] [PATCH 4/7] drm/i915: fix register naming

[Ewelina Musial]

On Fri, Nov 10, 2017 at 07:08:42PM +0000, Lionel Landwerlin wrote:
> This name was added with the whitelisting of registers for building up OA
> configs. It is contained in a range gen8 whitelist :
> 
>    addr >= RPM_CONFIG0.reg && addr <= NOA_CONFIG(8).reg
> 
> Hence why the name isn't used anywhere.
> 
> v2: Fix register name again RPC->RCP (Matthew)
> 
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Ewelina Musial <ewelina.musial at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 8f3cf50f04b4..f812224d1fc8 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1117,8 +1117,8 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
>  #define RPM_CONFIG0	    _MMIO(0x0D00)
>  #define RPM_CONFIG1	    _MMIO(0x0D04)
>  
> -/* RPC unit config (Gen8+) */
> -#define RPM_CONFIG	    _MMIO(0x0D08)
> +/* RCP unit config (Gen8+) */
> +#define RCP_CONFIG	    _MMIO(0x0D08)
>  
>  /* NOA (HSW) */
>  #define HSW_MBVID2_NOA0		_MMIO(0x9E80)
> -- 
> 2.15.0
> 
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