[Intel-gfx] [PATCH] drm/i915: Don't use GEN6_RC_VIDEO_FREQ on gen10+

Rodrigo Vivi rodrigo.vivi at intel.com
Mon Nov 13 18:20:10 UTC 2017


On Mon, Nov 13, 2017 at 02:06:28PM +0000, David Weinehall wrote:
> On Fri, Nov 10, 2017 at 11:53:58AM -0800, Rodrigo Vivi wrote:
> > On Fri, Nov 10, 2017 at 02:29:29PM +0000, David Weinehall wrote:
> > > GEN6_RC_VIDEO_FREQ is deprecated for >= gen10;
> > > don't try to program it.
> > > 
> > > Signed-off-by: David Weinehall <david.weinehall at linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_pm.c | 11 +++++++----
> > >  1 file changed, 7 insertions(+), 4 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > index 07118c0b69d3..9f0ca3ae28f8 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -6568,11 +6568,14 @@ static void gen9_enable_rps(struct drm_i915_private *dev_priv)
> > >  {
> > >  	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
> > >  
> > > -	/* Program defaults and thresholds for RPS*/
> > > -	I915_WRITE(GEN6_RC_VIDEO_FREQ,
> > > -		GEN9_FREQUENCY(dev_priv->gt_pm.rps.rp1_freq));
> > > +	/* Program defaults and thresholds for RPS */
> > > +
> > > +	/* GEN6_RC_VIDEO_FREQ is deprecated for >= gen10 */
> > > +	if (INTEL_GEN(dev_priv) == 9)
> > 
> > I believe if we use INTEL_GEN < 10 we can avoid the comment.
> > 
> > I noticed now that we have nowadays other cases with INTEL_GEN == <num>
> > so I wonder if this is our new trend or if we should stop doing this
> > and use our old IS_GEN<num> everywhere as possible... in this case IS_GEN9.
> 
> Right, IS_GEN9() would probably make more sense.

with IS_GEN9(),

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>


> 
> > I won't niptick on those... since the content itself of this patch
> > is right according to the PM specs. So, one way or another fell free
> > to use:
> > 
> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > 
> > > +		I915_WRITE(GEN6_RC_VIDEO_FREQ,
> > > +			GEN9_FREQUENCY(dev_priv->gt_pm.rps.rp1_freq));
> > >  
> > > -	/* 1 second timeout*/
> > > +	/* 1 second timeout */
> > >  	I915_WRITE(GEN6_RP_DOWN_TIMEOUT,
> > >  		GT_INTERVAL_FROM_US(dev_priv, 1000000));
> > >  
> > > -- 
> > > 2.15.0
> > > 


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