[Intel-gfx] [PATCH 3/4] drm/i915: expose EU topology through sysfs

Lionel Landwerlin lionel.g.landwerlin at intel.com
Fri Nov 17 11:25:18 UTC 2017


On 17/11/17 11:17, Chris Wilson wrote:
> Quoting Lionel Landwerlin (2017-11-17 11:08:07)
>> On 17/11/17 10:53, Chris Wilson wrote:
>>> Is this subslicing only for the render unit; are all platforms going to
>>> have the same fusing across all units? At the least, I thought we would
>>> be able to configure the powergating of the different slices on the
>>> different units. It seems a logical extension that fusing would be
>>> similar.
>> I'm not quite sure what you're asking.
> Just whether we will have different configurations on different
> engine-class in the near future. If this should be an rcs/ property as
> we will also gain similar topologies for vcs.
> (Along those lines, I think we should do gt/class/instance/*,
> gt/class/topology for the case in point.)
> -Chris
>
Ah, I see. Actually I don't mind updating the layout to put topology in 
the engine instance.

-

Lionel



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