[Intel-gfx] [PATCH] drm/i915: Enable IPS with only sprite plane visible too, v3.

Ville Syrjälä ville.syrjala at linux.intel.com
Wed Nov 22 15:28:16 UTC 2017


On Wed, Nov 22, 2017 at 04:08:03PM +0100, Maarten Lankhorst wrote:
> This comment predates atomic, and I think with the way we currently
> track IPS, it's safe to enable this for the case we switch too.
> 
> Changes since v1:
> - Keep IPS enabled when switching planes.
> Changes since v2:
> - Enable IPS when at least one plane is enabled. (Ville)
> 
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 9 ++-------
>  1 file changed, 2 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index b62cb6e90669..77778bc0f0ff 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6267,13 +6267,8 @@ static bool hsw_compute_ips_config(struct intel_crtc_state *pipe_config)
>  	if (pipe_config->ips_force_disable)
>  		return false;
>  
> -	/*
> -	 * FIXME IPS should be fine as long as one plane is
> -	 * enabled, but in practice it seems to have problems
> -	 * when going from primary only to sprite only and vice
> -	 * versa.
> -	 */
> -	if (!(pipe_config->active_planes & BIT(PLANE_PRIMARY)))
> +	/* IPS should be fine as long as at least one plane is enabled. */
> +	if (pipe_config->active_planes & ~BIT(PLANE_CURSOR))

== 0 missing

>  		return false;
>  
>  	/* HSW can handle pixel rate up to cdclk? */
> -- 
> 2.15.0

-- 
Ville Syrjälä
Intel OTC


More information about the Intel-gfx mailing list