[Intel-gfx] [PATCH 2/2] drm/i915/selftests: test descending addresses

[Chris Wilson]

Quoting Matthew Auld (2017-11-23 13:22:58)
> For igt_write_huge make sure the higher gtt offsets don't feel left out,
> which is especially true when dealing with the 48b PPGTT, where we
> timeout long before we are able exhaust the address space.
> 
> Suggested-by: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Matthew Auld <matthew.auld at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> ---
> @@ -1048,9 +1104,7 @@ static int igt_write_huge(struct i915_gem_context *ctx,
>         static struct intel_engine_cs *engines[I915_NUM_ENGINES];
>         struct intel_engine_cs *engine;
>         I915_RND_STATE(prng);
> -       IGT_TIMEOUT(end_time);
> -       struct i915_vma *vma;
> -       unsigned int flags = PIN_USER | PIN_OFFSET_FIXED;
> +       unsigned long end_time = jiffies + i915_selftest.timeout_jiffies * 2;

I'm still unconcerned about the need to bump timeout here, and would
stick with IGT_TIMEOUT() until proven otherwise. (Yes, for the plans to
use various boundaries, we should try to generalise the patterns
employed in selftests/i915_gem_gtt.c. Hmm)

If you use IGT_TIMEOUT() here or explain your reason otherwise,
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris