[Intel-gfx] [PATCH v2] drm/i915/glk: Apply WaProgramL3SqcReg1DefaultForPerf for GLK too

[Ville Syrjälä]

On Fri, Nov 24, 2017 at 10:37:12AM +0200, Valtteri Rantala wrote:
> Testing the texture read performance shows that the same tuning for
> the SQ credits is needed on GLK as on BXT/APL. This has been also
> confirmed by Altug from the HW team.
> 
> V2: Rebase
> 
> Signed-off-by: Valtteri Rantala <valtteri.rantala at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_engine_cs.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index fede62d..e1dcc91 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -1067,6 +1067,15 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
>  	/* WaDisableSTUnitPowerOptimization:skl,bxt,kbl,glk,cfl */
>  	WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE);
>  
> +	/* WaProgramL3SqcReg1DefaultForPerf:bxt,glk */
> +	if (IS_GEN9_LP(dev_priv)) {
> +		u32 val = I915_READ(GEN8_L3SQCREG1);
> +
> +		val &= ~L3_PRIO_CREDITS_MASK;
> +		val |= L3_GENERAL_PRIO_CREDITS(62) | L3_HIGH_PRIO_CREDITS(2);
> +		I915_WRITE(GEN8_L3SQCREG1, val);
> +	}

We're now doing this twice on bxt aren't we? So pls either remove the
same code from the bxt function, or just add this to the glk function
instead of here.

We might want to actually split gen9_init_workarounds() into big core
and lp variants. IMO there are too many conditional branches in the
current function, which sort of defeats the purpose of having platform
specific init_workarounds() functions in the first place.

> +
>  	/* WaOCLCoherentLineFlush:skl,bxt,kbl,cfl */
>  	I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) |
>  				    GEN8_LQSC_FLUSH_COHERENT_LINES));
> -- 
> 2.7.4
> 
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-- 
Ville Syrjälä
Intel OTC