[Intel-gfx] [PATCH 3/4] drm/i915: Consolidate checks for engine stats availability

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Sagar noticed the check can be consolidated between the engine stats
implementation and the PMU.

My first choice was a static inline helper but that got into include
ordering mess quickly fast so I went with a macro instead. At some point
we should perhaps looking into taking out the non-ringubffer bits from
intel_ringbuffer.h into a new intel_engine.h or something.

v2: Use engine->flags. (Chris Wilson)
v3: Rebase and mark GuC as not yet supported. (Chris Wilson)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
Suggested-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble at intel.com>
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk> (v2)
---
 drivers/gpu/drm/i915/i915_pmu.c             | 11 ++++-------
 drivers/gpu/drm/i915/intel_engine_cs.c      |  4 ++--
 drivers/gpu/drm/i915/intel_guc_submission.c |  7 +++++++
 drivers/gpu/drm/i915/intel_lrc.c            |  2 ++
 drivers/gpu/drm/i915/intel_ringbuffer.h     |  6 ++++++
 5 files changed, 21 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 3357b690ce90..c3c641ec962b 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -90,11 +90,6 @@ static unsigned int event_enabled_bit(struct perf_event *event)
 	return config_enabled_bit(event->attr.config);
 }
 
-static bool supports_busy_stats(struct drm_i915_private *i915)
-{
-	return INTEL_GEN(i915) >= 8;
-}
-
 static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
 {
 	u64 enable;
@@ -123,8 +118,10 @@ static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
 	/*
 	 * Also there is software busyness tracking available we do not
 	 * need the timer for I915_SAMPLE_BUSY counter.
+	 *
+	 * Use RCS as proxy for all engines.
 	 */
-	else if (supports_busy_stats(i915))
+	else if (intel_engine_supports_stats(i915->engine[RCS]))
 		enable &= ~BIT(I915_SAMPLE_BUSY);
 
 	/*
@@ -447,7 +444,7 @@ static void i915_pmu_event_read(struct perf_event *event)
 
 static bool engine_needs_busy_stats(struct intel_engine_cs *engine)
 {
-	return supports_busy_stats(engine->i915) &&
+	return intel_engine_supports_stats(engine) &&
 	       (engine->pmu.enable & BIT(I915_SAMPLE_BUSY));
 }
 
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index d27e124d826a..b58915ea7557 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1829,7 +1829,7 @@ int intel_enable_engine_stats(struct intel_engine_cs *engine)
 {
 	unsigned long flags;
 
-	if (INTEL_GEN(engine->i915) < 8)
+	if (!intel_engine_supports_stats(engine))
 		return -ENODEV;
 
 	spin_lock_irqsave(&engine->stats.lock, flags);
@@ -1890,7 +1890,7 @@ void intel_disable_engine_stats(struct intel_engine_cs *engine)
 {
 	unsigned long flags;
 
-	if (INTEL_GEN(engine->i915) < 8)
+	if (!intel_engine_supports_stats(engine))
 		return;
 
 	spin_lock_irqsave(&engine->stats.lock, flags);
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
index cf1cc2cb6722..a8e63779de79 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -1453,6 +1453,8 @@ int intel_guc_submission_enable(struct intel_guc *guc)
 		execlists->tasklet.func = guc_submission_tasklet;
 		engine->park = guc_submission_park;
 		engine->unpark = guc_submission_unpark;
+
+		engine->flags &= ~I915_ENGINE_SUPPORTS_STATS;
 	}
 
 	return 0;
@@ -1465,6 +1467,8 @@ int intel_guc_submission_enable(struct intel_guc *guc)
 void intel_guc_submission_disable(struct intel_guc *guc)
 {
 	struct drm_i915_private *dev_priv = guc_to_i915(guc);
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
 
 	GEM_BUG_ON(dev_priv->gt.awake); /* GT should be parked first */
 
@@ -1473,6 +1477,9 @@ void intel_guc_submission_disable(struct intel_guc *guc)
 	/* Revert back to manual ELSP submission */
 	intel_engines_reset_default_submission(dev_priv);
 
+	for_each_engine(engine, dev_priv, id)
+		engine->flags |= I915_ENGINE_SUPPORTS_STATS;
+
 	guc_clients_destroy(guc);
 }
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 479f880c0f2f..b811f7cddd7e 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1983,6 +1983,8 @@ intel_engine_setup_execlist(struct intel_engine_cs *engine)
 
 	execlists->queue = RB_ROOT;
 	execlists->first = NULL;
+
+	engine->flags |= I915_ENGINE_SUPPORTS_STATS;
 }
 
 static void
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index a91ce63b88b6..c68ab3ead83c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -540,6 +540,7 @@ struct intel_engine_cs {
 	struct intel_engine_hangcheck hangcheck;
 
 #define I915_ENGINE_NEEDS_CMD_PARSER BIT(0)
+#define I915_ENGINE_SUPPORTS_STATS   BIT(1)
 	unsigned int flags;
 
 	/*
@@ -604,6 +605,11 @@ static inline bool intel_engine_needs_cmd_parser(struct intel_engine_cs *engine)
 	return engine->flags & I915_ENGINE_NEEDS_CMD_PARSER;
 }
 
+static inline bool intel_engine_supports_stats(struct intel_engine_cs *engine)
+{
+	return engine->flags & I915_ENGINE_SUPPORTS_STATS;
+}
+
 static inline void
 execlists_set_active(struct intel_engine_execlists *execlists,
 		     unsigned int bit)
-- 
2.14.1