[Intel-gfx] [PATCH v5 2/2] drm/i915: Consolidate checks for engine stats availability
Tvrtko Ursulin
tursulin at ursulin.net
Wed Nov 29 08:24:50 UTC 2017
From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
Sagar noticed the check can be consolidated between the engine stats
implementation and the PMU.
My first choice was a static inline helper but that got into include
ordering mess quickly fast so I went with a macro instead. At some point
we should perhaps looking into taking out the non-ringubffer bits from
intel_ringbuffer.h into a new intel_engine.h or something.
v2: Use engine->flags. (Chris Wilson)
v3: Rebase and mark GuC as not yet supported. (Chris Wilson)
v4: Move flag setting to intel_engines_reset_default_submission.
(Chris Wilson)
v5: Move flag setting to logical_ring_setup.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
Suggested-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble at intel.com>
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk> (v2)
---
drivers/gpu/drm/i915/i915_pmu.c | 11 ++++-------
drivers/gpu/drm/i915/intel_engine_cs.c | 8 +++++---
drivers/gpu/drm/i915/intel_guc_submission.c | 2 ++
drivers/gpu/drm/i915/intel_lrc.c | 2 ++
drivers/gpu/drm/i915/intel_ringbuffer.h | 6 ++++++
5 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 1c0ee9d68b04..e8e2faf4982f 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -90,11 +90,6 @@ static unsigned int event_enabled_bit(struct perf_event *event)
return config_enabled_bit(event->attr.config);
}
-static bool supports_busy_stats(struct drm_i915_private *i915)
-{
- return INTEL_GEN(i915) >= 8;
-}
-
static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
{
u64 enable;
@@ -123,8 +118,10 @@ static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
/*
* Also there is software busyness tracking available we do not
* need the timer for I915_SAMPLE_BUSY counter.
+ *
+ * Use RCS as proxy for all engines.
*/
- else if (supports_busy_stats(i915))
+ else if (intel_engine_supports_stats(i915->engine[RCS]))
enable &= ~BIT(I915_SAMPLE_BUSY);
/*
@@ -447,7 +444,7 @@ static void i915_pmu_event_read(struct perf_event *event)
static bool engine_needs_busy_stats(struct intel_engine_cs *engine)
{
- return supports_busy_stats(engine->i915) &&
+ return intel_engine_supports_stats(engine) &&
(engine->pmu.enable & BIT(I915_SAMPLE_BUSY));
}
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index fede62daf3e1..3143b8ed7a0c 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1561,8 +1561,10 @@ void intel_engines_reset_default_submission(struct drm_i915_private *i915)
struct intel_engine_cs *engine;
enum intel_engine_id id;
- for_each_engine(engine, i915, id)
+ for_each_engine(engine, i915, id) {
engine->set_default_submission(engine);
+ engine->flags |= I915_ENGINE_SUPPORTS_STATS;
+ }
}
/**
@@ -1863,7 +1865,7 @@ int intel_enable_engine_stats(struct intel_engine_cs *engine)
{
unsigned long flags;
- if (INTEL_GEN(engine->i915) < 8)
+ if (!intel_engine_supports_stats(engine))
return -ENODEV;
spin_lock_irqsave(&engine->stats.lock, flags);
@@ -1924,7 +1926,7 @@ void intel_disable_engine_stats(struct intel_engine_cs *engine)
{
unsigned long flags;
- if (INTEL_GEN(engine->i915) < 8)
+ if (!intel_engine_supports_stats(engine))
return;
spin_lock_irqsave(&engine->stats.lock, flags);
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
index cf1cc2cb6722..912ff143d531 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -1453,6 +1453,8 @@ int intel_guc_submission_enable(struct intel_guc *guc)
execlists->tasklet.func = guc_submission_tasklet;
engine->park = guc_submission_park;
engine->unpark = guc_submission_unpark;
+
+ engine->flags &= ~I915_ENGINE_SUPPORTS_STATS;
}
return 0;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 570864583e28..904d9f821c2f 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1963,6 +1963,8 @@ logical_ring_setup(struct intel_engine_cs *engine)
/* Intentionally left blank. */
engine->buffer = NULL;
+ engine->flags |= I915_ENGINE_SUPPORTS_STATS;
+
fw_domains = intel_uncore_forcewake_for_reg(dev_priv,
RING_ELSP(engine),
FW_REG_WRITE);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index a91ce63b88b6..c68ab3ead83c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -540,6 +540,7 @@ struct intel_engine_cs {
struct intel_engine_hangcheck hangcheck;
#define I915_ENGINE_NEEDS_CMD_PARSER BIT(0)
+#define I915_ENGINE_SUPPORTS_STATS BIT(1)
unsigned int flags;
/*
@@ -604,6 +605,11 @@ static inline bool intel_engine_needs_cmd_parser(struct intel_engine_cs *engine)
return engine->flags & I915_ENGINE_NEEDS_CMD_PARSER;
}
+static inline bool intel_engine_supports_stats(struct intel_engine_cs *engine)
+{
+ return engine->flags & I915_ENGINE_SUPPORTS_STATS;
+}
+
static inline void
execlists_set_active(struct intel_engine_execlists *execlists,
unsigned int bit)
--
2.14.1
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