[Intel-gfx] [PATCH v2 1/3] drm/i915/guc: Change default GuC FW for SKL to v9.33

[Srivatsa, Anusha]

>-----Original Message-----
>From: Kamble, Sagar A
>Sent: Wednesday, November 29, 2017 8:19 AM
>To: intel-gfx at lists.freedesktop.org
>Cc: Kamble, Sagar A <sagar.a.kamble at intel.com>; Mcgee, Jeff
><jeff.mcgee at intel.com>; Spotswood, John A <john.a.spotswood at intel.com>;
>Srivatsa, Anusha <anusha.srivatsa at intel.com>; Wajdeczko, Michal
><Michal.Wajdeczko at intel.com>; Vivi, Rodrigo <rodrigo.vivi at intel.com>; Joonas
>Lahtinen <joonas.lahtinen at linux.intel.com>
>Subject: [PATCH v2 1/3] drm/i915/guc: Change default GuC FW for SKL to v9.33
>
>This patch makes v9.33 firmware as default firmware for SKL.
>
>Note: GuC logging control is changed with this firmware. GuC is expecting i915 to
>set control bit to enable "default logging"
>while using GuC action UK_LOG_ENABLE_LOGGING.
>However i915 is currently not doing this because it is version specific change and
>can be handled entirely in GuC. It will need to be fixed in future firmwares.
>
>This update includes (since v6.1):
>
>- HuC RSA Keys updated.
>- Adding per engine preemption support in GuC scheduler
>- Minor bug fixes.
>- Added support to log media reset count for host to read it
>- Sub-feature level control for power management features.
>- Minor clean-up for power management interface.
>- Unified power management interface and scheduler interface into
>  1 file using same version.
>- Bug Fix for multi context scheduler flag.
>- DCC spec changes for BXT + DCT enabling
>- SB based Pre-ETM/ETM flow enabling for debug signed GuC/HuC
>- Moving GuC non_critical r/w data to lower SRAM 64KB
>- Media engine Reset fix.  Correctly marking context for resubmission in
>  Media Reset case.
>- ABT Disable bug fix. Disabled Evaluation mode on context change.
>- Async FW in Engine Schedule feature (not enabled from KMD)
>- GuC clean up to align developer build in line to production build.
>- DCC consistency fix for SKL
>- Disable ARAT interrupt before programming ARAT delta.
>- Memory range check in Parse to avoid failure due to overflow.
>- Enabled WA for MSGCH hang issue
>- Clear forcewake in CSB when SQ is empty.
>- Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder.
>- This is file location change.No functional change done as part of this
>  check in.
>- Enable decoupled freq for SKL GT4
>- 3 tries of wake request needed from GuC2CSME for ME to wake up. Request
>  has come from ME spec
>- During reset one parameter was not getting accounted
>- Enabling Guc Log changes for ultra low logging for OCA
>- Enabling build failure check to catch critical section overflow.
>- Disable build.bat redundant prints.
>- Move few least used functions to non-critical section.
>- Rearrange GuC documentation folder structure.
>- Synchronize SLPC internal debug interface with other branches.
>- Fixing Issue with Default Guc Log changes for OCA using special Control
>  Bit
>
>v2: Rebase. Updated commit message.
>
>Signed-off-by: Jeff McGee <jeff.mcgee at intel.com>
>Signed-off-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
>Cc: Spotswood John A <john.a.spotswood at intel.com>
>Cc: Anusha Srivatsa <anusha.srivatsa at intel.com>
>Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
>Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
>Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa at intel.com>

> drivers/gpu/drm/i915/intel_guc_fw.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
>b/drivers/gpu/drm/i915/intel_guc_fw.c
>index bbab4e1..631e932 100644
>--- a/drivers/gpu/drm/i915/intel_guc_fw.c
>+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
>@@ -30,8 +30,8 @@
> #include "intel_guc_fw.h"
> #include "i915_drv.h"
>
>-#define SKL_FW_MAJOR 6
>-#define SKL_FW_MINOR 1
>+#define SKL_FW_MAJOR 9
>+#define SKL_FW_MINOR 33
>
> #define BXT_FW_MAJOR 8
> #define BXT_FW_MINOR 7
>--
>1.9.1