[Intel-gfx] [PATCH] drm/i915: Transform whitelisting WAs into a simple reg write
Mika Kuoppala
mika.kuoppala at linux.intel.com
Wed Oct 4 12:39:13 UTC 2017
Oscar Mateo <oscar.mateo at intel.com> writes:
> RING_FORCE_TO_NONPRIV registers do not live in the logical context. They are simply
> global privileged MMIO registers that happen to be powercontext saved and restored
> (meaning only they can survive RC6). Therefore, there is absolutely no need to save
> them so that they can be restored everytime we create a new logical context.
>
> Suggested-by: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_engine_cs.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index a28e2a8..a75f5e8 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -845,8 +845,8 @@ static int wa_ring_whitelist_reg(struct intel_engine_cs *engine,
> if (WARN_ON(index >= RING_MAX_NONPRIV_SLOTS))
> return -EINVAL;
>
> - WA_WRITE(RING_FORCE_TO_NONPRIV(engine->mmio_base, index),
> - i915_mmio_reg_offset(reg));
> + I915_WRITE(RING_FORCE_TO_NONPRIV(engine->mmio_base, index),
> + i915_mmio_reg_offset(reg));
#define WA_WRITE should also been removed as it is clearly
dangerous. Chris pointed out that anything with nonmasked access
is not part of context image, and this seems to hold true in
atleast with current cases.
But removing of define can be a followup.
Reviewed-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> wa->hw_whitelist_count[engine->id]++;
>
> return 0;
> --
> 1.9.1
More information about the Intel-gfx
mailing list