[Intel-gfx] [PATCH 2/2] drm/i915: Remove WA_(SET|CLR)_BIT

Chris Wilson chris at chris-wilson.co.uk
Wed Oct 4 12:41:53 UTC 2017


These macros are of dubious merit when coupled with the per-context w/a
set. Instead of tweaking the value in the context, they tweak the value
based on the mmio at the time of recording; they are almost by
definition not per-context! Having removed the last users, remove the
macros to avoid temptation in the future.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
Cc: Oscar Mateo <oscar.mateo at intel.com>
---
 drivers/gpu/drm/i915/intel_engine_cs.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 06044f1f48c8..60d500e27af0 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -830,9 +830,6 @@ static int wa_add(struct drm_i915_private *dev_priv,
 #define WA_SET_FIELD_MASKED(addr, mask, value) \
 	WA_REG(addr, mask, _MASKED_FIELD(mask, value))
 
-#define WA_SET_BIT(addr, mask) WA_REG(addr, mask, I915_READ(addr) | (mask))
-#define WA_CLR_BIT(addr, mask) WA_REG(addr, mask, I915_READ(addr) & ~(mask))
-
 #define WA_WRITE(addr, val) WA_REG(addr, 0xffffffff, val)
 
 static int wa_ring_whitelist_reg(struct intel_engine_cs *engine,
-- 
2.14.2



More information about the Intel-gfx mailing list