[Intel-gfx] [PATCH 05/13] drm/i915/cnl: extract cnl_dvfs_{pre, post}_change
Ausmus, James
james.ausmus at intel.com
Wed Oct 4 21:58:14 UTC 2017
On Tue, Oct 3, 2017 at 12:06 AM, Rodrigo Vivi <rodrigo.vivi at intel.com> wrote:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
>
> These functions even have their own page in our spec,
> so extract them from cnl_set_cdclk().
>
> v2: (By Rodrigo) Fixed inverted logic on error return of
> cnl_dvfs_pre_change.
>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
Reviewed-by: James Ausmus <james.ausmus at intel.com>
> ---
> drivers/gpu/drm/i915/intel_cdclk.c | 33 +++++++++++++++++++++++----------
> 1 file changed, 23 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
> index 87fc42b19336..b35eb145d66e 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -1510,12 +1510,8 @@ static void cnl_cdclk_pll_enable(struct drm_i915_private *dev_priv, int vco)
> dev_priv->cdclk.hw.vco = vco;
> }
>
> -static void cnl_set_cdclk(struct drm_i915_private *dev_priv,
> - const struct intel_cdclk_state *cdclk_state)
> +static int cnl_dvfs_pre_change(struct drm_i915_private *dev_priv)
> {
> - int cdclk = cdclk_state->cdclk;
> - int vco = cdclk_state->vco;
> - u32 val, divider, pcu_ack;
> int ret;
>
> mutex_lock(&dev_priv->rps.hw_lock);
> @@ -1524,11 +1520,30 @@ static void cnl_set_cdclk(struct drm_i915_private *dev_priv,
> SKL_CDCLK_READY_FOR_CHANGE,
> SKL_CDCLK_READY_FOR_CHANGE, 3);
> mutex_unlock(&dev_priv->rps.hw_lock);
> - if (ret) {
> +
> + if (ret)
> DRM_ERROR("Failed to inform PCU about cdclk change (%d)\n",
> ret);
> +
> + return ret;
> +}
> +
> +static void cnl_dvfs_post_change(struct drm_i915_private *dev_priv, int level)
> +{
> + mutex_lock(&dev_priv->rps.hw_lock);
> + sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL, level);
> + mutex_unlock(&dev_priv->rps.hw_lock);
> +}
> +
> +static void cnl_set_cdclk(struct drm_i915_private *dev_priv,
> + const struct intel_cdclk_state *cdclk_state)
> +{
> + int cdclk = cdclk_state->cdclk;
> + int vco = cdclk_state->vco;
> + u32 val, divider, pcu_ack;
> +
> + if (cnl_dvfs_pre_change(dev_priv))
> return;
> - }
>
> /* cdclk = vco / 2 / div{1,2} */
> switch (DIV_ROUND_CLOSEST(vco, cdclk)) {
> @@ -1575,9 +1590,7 @@ static void cnl_set_cdclk(struct drm_i915_private *dev_priv,
> I915_WRITE(CDCLK_CTL, val);
>
> /* inform PCU of the change */
> - mutex_lock(&dev_priv->rps.hw_lock);
> - sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL, pcu_ack);
> - mutex_unlock(&dev_priv->rps.hw_lock);
> + cnl_dvfs_post_change(dev_priv, pcu_ack);
>
> intel_update_cdclk(dev_priv);
> }
> --
> 2.13.5
>
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--
James Ausmus
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