[Intel-gfx] [RFC PATCH] drm/i915: push shared dpll enable to encoders on DDI platforms

[Daniel Vetter]

On Fri, Oct 06, 2017 at 10:07:45AM +0200, Daniel Vetter wrote:
> On Thu, Oct 05, 2017 at 02:50:13PM +0300, Jani Nikula wrote:
> > Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_crt.c     |  3 +++
> >  drivers/gpu/drm/i915/intel_ddi.c     | 18 ++++++++++++++++++
> >  drivers/gpu/drm/i915/intel_display.c |  3 ---
> >  3 files changed, 21 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
> > index 668e8c3e791d..b3094d606329 100644
> > --- a/drivers/gpu/drm/i915/intel_crt.c
> > +++ b/drivers/gpu/drm/i915/intel_crt.c
> > @@ -255,6 +255,9 @@ static void hsw_pre_pll_enable_crt(struct intel_encoder *encoder,
> >  	WARN_ON(!intel_crtc->config->has_pch_encoder);
> >  
> >  	intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
> > +
> > +	if (intel_crtc->config->shared_dpll)
> > +		intel_enable_shared_dpll(intel_crtc);
> >  }
> 
> Looking at haswell_crtc_compute_clock all outputs on hsw+ need a shared
> dpll, except dsi. Here's my proposal:
> 
> - Drop the if condition when pushing into encoder callbacks, we statically
>   know which one it is. With that I think this patch here looks good.

Note that you don't need to add a WARN_ON to check this if you feel
paranoid, intel_enable_shared_dpll already has you covered (including safe
bail-out if the dpll isn't assigned).
-Daniel

> 
> - Push the clock computation into encoders to get rid of the silly DSI
>   special in haswell_crtc_compute_clock. Which then again will force you
>   to get rid of all the encoder special casing in dpll_mgr->get_dpll, plus
>   passing the encoder argument around.
> 
>   I think the prettier way to do this is to pre-fill the clock we want in
>   the encoder compute_config callback, and then also call
>   intel_find_shared_dpll from there.
> 
> There's a lot more that should be untangled imo in intel_ddi.c and
> computed in compute_config of the right encoder type instead of if ladders
> all over, but we're slowly getting there I think.
> 
> Cheers, Daniel
> 
> >  
> >  static void hsw_pre_enable_crt(struct intel_encoder *encoder,
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> > index f1adc2544ab9..c1152c602f08 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -2407,13 +2407,29 @@ static void intel_disable_ddi(struct intel_encoder *intel_encoder,
> >  	}
> >  }
> >  
> > +static void intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
> > +				     const struct intel_crtc_state *pipe_config,
> > +				     const struct drm_connector_state *conn_state)
> > +{
> > +	struct drm_crtc *crtc = pipe_config->base.crtc;
> > +	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> > +
> > +	if (intel_crtc->config->shared_dpll)
> > +		intel_enable_shared_dpll(intel_crtc);
> > +}
> > +
> >  static void bxt_ddi_pre_pll_enable(struct intel_encoder *encoder,
> >  				   const struct intel_crtc_state *pipe_config,
> >  				   const struct drm_connector_state *conn_state)
> >  {
> > +	struct drm_crtc *crtc = pipe_config->base.crtc;
> > +	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> >  	uint8_t mask = pipe_config->lane_lat_optim_mask;
> >  
> >  	bxt_ddi_phy_set_lane_optim_mask(encoder, mask);
> > +
> > +	if (intel_crtc->config->shared_dpll)
> > +		intel_enable_shared_dpll(intel_crtc);
> >  }
> >  
> >  void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)
> > @@ -2714,6 +2730,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> >  	intel_encoder->enable = intel_enable_ddi;
> >  	if (IS_GEN9_LP(dev_priv))
> >  		intel_encoder->pre_pll_enable = bxt_ddi_pre_pll_enable;
> > +	else
> > +		intel_encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
> >  	intel_encoder->pre_enable = intel_ddi_pre_enable;
> >  	intel_encoder->disable = intel_disable_ddi;
> >  	intel_encoder->post_disable = intel_ddi_post_disable;
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 9f2bf3b3f759..6d0573350786 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -5490,9 +5490,6 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
> >  
> >  	intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
> >  
> > -	if (intel_crtc->config->shared_dpll)
> > -		intel_enable_shared_dpll(intel_crtc);
> > -
> >  	if (intel_crtc_has_dp_encoder(intel_crtc->config))
> >  		intel_dp_set_m_n(intel_crtc, M1_N1);
> >  
> > -- 
> > 2.11.0
> > 
> 
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch