[Intel-gfx] [PATCH 00/12] Preemption with GuC, second try
Michał Winiarski
michal.winiarski at intel.com
Mon Oct 9 14:52:46 UTC 2017
I've included most of the review feedback, some of which caused additional
patches to appear. We're now using a separate object for GuC shared data (while
I was there I also added cleanup to guc stage desc pool creation). Since I
needed to iterate over clients in one additional place, I've converted them to
an array.
We're now also flushing the worker on reset and no longer using ordered wq
(using the one with max_active equal to number of engines).
Dave Gordon (1):
drm/i915/guc: Add a second client, to be used for preemption
Michał Winiarski (11):
drm/i915/guc: Extract GuC stage desc pool creation into a helper
drm/i915/guc: Allocate separate shared data object for GuC
communication
drm/i915/guc: Initialize GuC before restarting engines
drm/i915/guc: Add preemption action to GuC firmware interface
drm/i915/guc: Split guc_wq_item_append
drm/i915: Extract "emit write" part of emit breadcrumb functions
drm/i915: Add information needed to track engine preempt state
drm/i915/guc: Keep request->priority for its lifetime
drm/i915: Rename helpers used for unwinding, use macro for can_preempt
drm/i915/guc: Preemption! With GuC
HAX Enable GuC Submission for CI
drivers/gpu/drm/i915/i915_debugfs.c | 11 +-
drivers/gpu/drm/i915/i915_drv.c | 5 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_gem.c | 20 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 8 +-
drivers/gpu/drm/i915/i915_guc_submission.c | 407 ++++++++++++++++++++++-------
drivers/gpu/drm/i915/i915_params.h | 4 +-
drivers/gpu/drm/i915/intel_engine_cs.c | 6 +-
drivers/gpu/drm/i915/intel_guc.c | 8 +-
drivers/gpu/drm/i915/intel_guc.h | 12 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 40 +++
drivers/gpu/drm/i915/intel_lrc.c | 53 ++--
drivers/gpu/drm/i915/intel_lrc.h | 1 -
drivers/gpu/drm/i915/intel_ringbuffer.h | 54 ++++
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
15 files changed, 467 insertions(+), 166 deletions(-)
--
2.13.5
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