[Intel-gfx] [PATCH 8/9] drm/i915: Nuke crtc->plane

[Daniel Vetter]

On Wed, Oct 11, 2017 at 07:04:54PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Eliminate crtc->plane since it's pretty much a layering violation.
> We can always get the plane via crtc->primary if we actually need it.
> 
> The only ugly thing left is plane_to_crtc_mapping[], but that's
> still needed by the pre-g4x watermark code.
> 
> Also revise the comment about emum old_plane_id to make it clear
> one should not use it for SKL+ ever.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h      | 2 +-
>  drivers/gpu/drm/i915/intel_display.c | 5 ++---
>  drivers/gpu/drm/i915/intel_drv.h     | 1 -
>  drivers/gpu/drm/i915/intel_fbc.c     | 4 ++--
>  4 files changed, 5 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 9c4735da2169..0b97860ba39c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -305,7 +305,7 @@ static inline bool transcoder_is_dsi(enum transcoder transcoder)
>  
>  /*
>   * Global legacy plane identifier. Valid only for primary/sprite
> - * planes on pre-g4x, and only for primary planes on g4x+.
> + * planes on pre-g4x, and only for primary planes on g4x-bdw.
>   */

Hm, should be moved into the patch that introduces old_plane_id?

Anyway, with or without that hunk moved.

Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>

>  enum old_plane_id {
>  	PLANE_A,
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index ccdfd922fe5b..622b487629d7 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13386,14 +13386,13 @@ static int intel_crtc_init(struct drm_i915_private *dev_priv, enum pipe pipe)
>  		goto fail;
>  
>  	intel_crtc->pipe = pipe;
> -	intel_crtc->plane = primary->plane;
>  
>  	/* initialize shared scalers */
>  	intel_crtc_init_scalers(intel_crtc, crtc_state);
>  
>  	BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
> -	       dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
> -	dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = intel_crtc;
> +	       dev_priv->plane_to_crtc_mapping[primary->plane] != NULL);
> +	dev_priv->plane_to_crtc_mapping[primary->plane] = intel_crtc;
>  	dev_priv->pipe_to_crtc_mapping[intel_crtc->pipe] = intel_crtc;
>  
>  	drm_crtc_helper_add(&intel_crtc->base, &intel_helper_funcs);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 0852b33712b1..8396d4de9299 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -793,7 +793,6 @@ struct intel_crtc_state {
>  struct intel_crtc {
>  	struct drm_crtc base;
>  	enum pipe pipe;
> -	enum old_plane_id plane;
>  	/*
>  	 * Whether the crtc and the connected output pipeline is active. Implies
>  	 * that crtc->enabled is set, i.e. the current mode configuration has
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
> index 0b40b89f8e2b..567f10380a0f 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -887,7 +887,7 @@ static void intel_fbc_get_reg_params(struct intel_crtc *crtc,
>  	params->vma = cache->vma;
>  
>  	params->crtc.pipe = crtc->pipe;
> -	params->crtc.plane = crtc->plane;
> +	params->crtc.plane = to_intel_plane(crtc->base.primary)->plane;
>  	params->crtc.fence_y_offset = get_crtc_fence_y_offset(crtc);
>  
>  	params->fb.format = cache->fb.format;
> @@ -1083,7 +1083,7 @@ void intel_fbc_choose_crtc(struct drm_i915_private *dev_priv,
>  		if (fbc_on_pipe_a_only(dev_priv) && crtc->pipe != PIPE_A)
>  			continue;
>  
> -		if (fbc_on_plane_a_only(dev_priv) && crtc->plane != PLANE_A)
> +		if (fbc_on_plane_a_only(dev_priv) && plane->plane != PLANE_A)
>  			continue;
>  
>  		crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
> -- 
> 2.13.6
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch