[Intel-gfx] [PATCH v6 1/3] drm/i915/guc : Unifying seq_puts messages for feature support

Sujaritha sujaritha.sundaresan at intel.com
Mon Oct 16 17:12:16 UTC 2017



On 10/13/2017 02:05 AM, Sagar Arun Kamble wrote:
> Keep subject as "drm/i915" as this is generic change. Also I saw 
> i915_runtime_pm_status debugfs output not updated.
>
> Could you please check.
>
>
I did not change the seq_puts message of i915_runtime_pm_status debugfs 
since it doesn't fit into the unified "early return" pattern.

Sujaritha
>
> On 10/11/2017 12:02 AM, Sujaritha Sundaresan wrote:
>> Unifying the various seq_puts messages in debugfs to the simplest one 
>> for
>> feature support.
>>
>> v2: Clarifying the commit message (Anusha)
>>
>> v3: Re-factoring code as per review (Michal)
>>
>> v4: Rebase
>>
>> v5: Split from following patch
>>
>> v6: Re-factoring code (Michal, Sagar)
>>      Clarifying commit message (Sagar)
>>
>> Suggested by: Michal Wajdeczko <michal.wajdeczko at intel.com>
>> Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan at intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
>> Cc: Anusha Srivatsa <anusha.srivatsa at intel.com>
>> Cc: Oscar Mateo <oscar.mateo at intel.com>
>> Cc: Sagar Arun Kamble <sagar.a.kamble at intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_debugfs.c | 12 +++++++-----
>>   1 file changed, 7 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
>> b/drivers/gpu/drm/i915/i915_debugfs.c
>> index 5b58d2b..9d0c27b 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -1670,7 +1670,7 @@ static int i915_fbc_status(struct seq_file *m, 
>> void *unused)
>>       struct drm_i915_private *dev_priv = node_to_i915(m->private);
>>         if (!HAS_FBC(dev_priv)) {
>> -        seq_puts(m, "FBC unsupported on this chipset\n");
>> +        seq_puts(m, "not supported\n");
>>           return 0;
>>       }
>>   @@ -1837,7 +1837,7 @@ static int i915_ring_freq_table(struct 
>> seq_file *m, void *unused)
>>       unsigned int max_gpu_freq, min_gpu_freq;
>>         if (!HAS_LLC(dev_priv)) {
>> -        seq_puts(m, "unsupported on this chipset\n");
>> +        seq_puts(m, "not supported\n");
>>           return 0;
>>       }
>>   @@ -2391,6 +2391,7 @@ static int i915_huc_load_status_info(struct 
>> seq_file *m, void *data)
>>       struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
>>         if (!HAS_HUC_UCODE(dev_priv))
>> +        seq_puts(m, "not supported\n");
>>           return 0;
>>         seq_puts(m, "HuC firmware status:\n");
>> @@ -2424,6 +2425,7 @@ static int i915_guc_load_status_info(struct 
>> seq_file *m, void *data)
>>       u32 tmp, i;
>>         if (!HAS_GUC_UCODE(dev_priv))
>> +        seq_puts(m, "not supported\n");
>>           return 0;
>>         seq_printf(m, "GuC firmware status:\n");
>> @@ -2708,7 +2710,7 @@ static int i915_edp_psr_status(struct seq_file 
>> *m, void *data)
>>       bool enabled = false;
>>         if (!HAS_PSR(dev_priv)) {
>> -        seq_puts(m, "PSR not supported\n");
>> +        seq_puts(m, "not supported\n");
>>           return 0;
>>       }
>>   @@ -3565,7 +3567,7 @@ static void drrs_status_per_crtc(struct 
>> seq_file *m,
>>             mutex_lock(&drrs->mutex);
>>           /* DRRS Supported */
>> -        seq_puts(m, "\tDRRS Supported: Yes\n");
>> +        seq_puts(m, "supported\n");
>>             /* disable_drrs() will make drrs->dp NULL */
>>           if (!drrs->dp) {
>> @@ -3597,7 +3599,7 @@ static void drrs_status_per_crtc(struct 
>> seq_file *m,
>>           mutex_unlock(&drrs->mutex);
>>       } else {
>>           /* DRRS not supported. Print the VBT parameter*/
>> -        seq_puts(m, "\tDRRS Supported : No");
>> +        seq_puts(m, "not supported\n");
>>       }
>>       seq_puts(m, "\n");
>>   }
>



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