[Intel-gfx] [PATCH v3 17/22] drm/i915/bxt: Move GT and Display workarounds from init_clock_gating

[Chris Wilson]

Quoting Oscar Mateo (2017-10-13 21:54:11)
> To their rightful place inside intel_workarounds.c
> 
> Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c          | 26 ++------------------------
>  drivers/gpu/drm/i915/intel_workarounds.c | 15 +++++++++++++++
>  2 files changed, 17 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 6b621e5..85e3424 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -57,27 +57,6 @@
>  #define INTEL_RC6p_ENABLE                      (1<<1)
>  #define INTEL_RC6pp_ENABLE                     (1<<2)
>  
> -static void bxt_init_clock_gating(struct drm_i915_private *dev_priv)
> -{
> -       /* WaDisableSDEUnitClockGating:bxt */
> -       I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> -                  GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> -
> -       /*
> -        * FIXME:
> -        * GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ applies on 3x6 GT SKUs only.
> -        */
> -       I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> -                  GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);
> -
> -       /*
> -        * Wa: Backlight PWM may stop in the asserted state, causing backlight
> -        * to stay fully on.
> -        */
> -       I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
> -                  PWM1_GATING_DIS | PWM2_GATING_DIS);
> -}
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> index d2a968a..0ef2f46 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -880,6 +880,21 @@ static int bxt_display_workarounds_init(struct drm_i915_private *dev_priv)
>         if (ret)
>                 return ret;
>  
> +       /* WaDisableSDEUnitClockGating:bxt */
> +       DISPLAY_WA_SET_BIT(GEN8_UCGCTL6, GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> +
> +       /*
> +        * FIXME:
> +        * GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ applies on 3x6 GT SKUs only.
> +        */
> +       DISPLAY_WA_SET_BIT(GEN8_UCGCTL6, GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);
> +
> +       /*
> +        * Wa: Backlight PWM may stop in the asserted state, causing backlight
> +        * to stay fully on.
> +        */
> +       DISPLAY_WA_SET_BIT(GEN9_CLKGATE_DIS_0, PWM1_GATING_DIS | PWM2_GATING_DIS);
> +
>         return 0;
>  }

Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris