[Intel-gfx] [PATCH v3 19/22] drm/i915/chv: Move GT and Display workarounds from init_clock_gating

[Chris Wilson]

Quoting Oscar Mateo (2017-10-13 21:54:13)
> To their rightful place inside intel_workarounds.c
> 
> TODO: Notice that we are leaving WaProgramL3SqcReg1Default (and the
> associated WaTempDisableDOPClkGating) behind because it requires extra
> careful reviewing. We'll deal with it in a separate patch.
> 
> Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c          | 24 ------------------------
>  drivers/gpu/drm/i915/intel_workarounds.c | 21 +++++++++++++++++++++
>  2 files changed, 21 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index e1b00c9..438a129 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -8694,36 +8694,12 @@ static void vlv_init_clock_gating(struct drm_i915_private *dev_priv)
>  
>  static void chv_init_clock_gating(struct drm_i915_private *dev_priv)
>  {
> -       /* WaVSRefCountFullforceMissDisable:chv */
> -       /* WaDSRefCountFullforceMissDisable:chv */
> -       I915_WRITE(GEN7_FF_THREAD_MODE,
> -                  I915_READ(GEN7_FF_THREAD_MODE) &
> -                  ~(GEN8_FF_DS_REF_CNT_FFME | GEN7_FF_VS_REF_CNT_FFME));
> -
> -       /* WaDisableSemaphoreAndSyncFlipWait:chv */
> -       I915_WRITE(GEN6_RC_SLEEP_PSMI_CONTROL,
> -                  _MASKED_BIT_ENABLE(GEN8_RC_SEMA_IDLE_MSG_DISABLE));
> -
> -       /* WaDisableCSUnitClockGating:chv */
> -       I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) |
> -                  GEN6_CSUNIT_CLOCK_GATE_DISABLE);
> -
> -       /* WaDisableSDEUnitClockGating:chv */
> -       I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> -                  GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> -
>         /*
>          * WaProgramL3SqcReg1Default:chv
>          * See gfxspecs/Related Documents/Performance Guide/
>          * LSQC Setting Recommendations.
>          */
>         gen8_set_l3sqc_credits(dev_priv, 38, 2);
> -
> -       /*
> -        * GTT cache may not work with big pages, so if those
> -        * are ever enabled GTT cache may need to be disabled.
> -        */
> -       I915_WRITE(HSW_GTT_CACHE_EN, GTT_CACHE_EN_ALL);
>  }
>  
>  static void g4x_init_clock_gating(struct drm_i915_private *dev_priv)
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> index f48c10e..26e7e07 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -568,6 +568,21 @@ static int bdw_gt_workarounds_init(struct drm_i915_private *dev_priv)
>  
>  static int chv_gt_workarounds_init(struct drm_i915_private *dev_priv)
>  {
> +       /* WaVSRefCountFullforceMissDisable:chv */
> +       /* WaDSRefCountFullforceMissDisable:chv */
> +       GT_WA_CLR_BIT(GEN7_FF_THREAD_MODE, GEN8_FF_DS_REF_CNT_FFME |
> +                                          GEN7_FF_VS_REF_CNT_FFME);
> +
> +       /* WaDisableSemaphoreAndSyncFlipWait:chv */
> +       GT_WA_SET_BIT_MASKED(GEN6_RC_SLEEP_PSMI_CONTROL,
> +                            GEN8_RC_SEMA_IDLE_MSG_DISABLE);

Hmm, stares at w/a. So this just stops the device from sleeping when we
wait on a semaphore. Ok, doesn't seem like an immediate concern for
proposed semaphore usage.

> +       /*
> +        * GTT cache may not work with big pages, so if those
> +        * are ever enabled GTT cache may need to be disabled.
> +        */
> +       GT_WA_SET_FIELD(HSW_GTT_CACHE_EN, 0xFFFFFFFF, GTT_CACHE_EN_ALL);

Ok.

> +
>         return 0;
>  }
>  
> @@ -830,6 +845,12 @@ static int bdw_display_workarounds_init(struct drm_i915_private *dev_priv)
>  
>  static int chv_display_workarounds_init(struct drm_i915_private *dev_priv)
>  {
> +       /* WaDisableCSUnitClockGating:chv */
> +       DISPLAY_WA_SET_BIT(GEN6_UCGCTL1, GEN6_CSUNIT_CLOCK_GATE_DISABLE);
> +
> +       /* WaDisableSDEUnitClockGating:chv */
> +       DISPLAY_WA_SET_BIT(GEN8_UCGCTL6, GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> +
>         return 0;
>  }

Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
-Chris