[Intel-gfx] [PATCH] drm/i915/cnl: DDIA Lane capability bit not set in clone mode

[Rodrigo Vivi]

On Tue, Oct 17, 2017 at 08:04:04AM +0000, Jani Nikula wrote:
> On Mon, 16 Oct 2017, Rodrigo Vivi <rodrigo.vivi at intel.com> wrote:
> > From: Clint Taylor <clinton.a.taylor at intel.com>
> >
> > DDIA Lane capability control 4 lane bit is not being set by firmware during
> > clone mode boot. This occurs when multiple monitors are connected during
> > boot. The driver will configure the port for 2 lane maximum width if this
> > bit is not set.
> 
> Please be more specific about what you mean with clone mode.

Oh... yes, we need to change the comment.

I didn't see any relation here to the clone mode.
If eDP comes back on boot and HDMI comes later everything worked.

If HDMI is also present during boot at some point during initialization
we have probably a long pulse on edp that hits our check of max_level
and change that to 2, because this bit is unset as we were expecting.

I will grab more information here on the flow and proper update the commit message.

> 
> >
> > Cc: Mika Kahola <mika.kahola at intel.com>
> > Signed-off-by: Clint Taylor <clinton.a.taylor at intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> > index a9c0c16e3838..0ad915d71132 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -2791,9 +2791,10 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> >  	 * configuration so that we use the proper lane count for our
> >  	 * calculations.
> >  	 */
> 
> The comment above needs updating too. Also, it doesn't say anything
> about cloning.

I will update this comment also. But also not related to clone mode I believe.

> 
> BR,
> Jani.
> 
> > -	if (IS_GEN9_LP(dev_priv) && port == PORT_A) {
> > +	if ((IS_GEN9_LP(dev_priv) || IS_CANNONLAKE(dev_priv)) &&
> > +	    port == PORT_A) {
> >  		if (!(intel_dig_port->saved_port_bits & DDI_A_4_LANES)) {
> > -			DRM_DEBUG_KMS("BXT BIOS forgot to set DDI_A_4_LANES for port A; fixing\n");
> > +			DRM_DEBUG_KMS("BIOS forgot to set DDI_A_4_LANES for port A\n");
> >  			intel_dig_port->saved_port_bits |= DDI_A_4_LANES;
> >  			max_lanes = 4;
> >  		}
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center